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Message-ID: <20241021-outlying-washday-8f171dedc703@spud>
Date: Mon, 21 Oct 2024 13:10:52 +0100
From: Conor Dooley <conor@...nel.org>
To: Inochi Amaoto <inochiama@...il.com>
Cc: Chen Wang <unicorn_wang@...look.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Inochi Amaoto <inochiama@...look.com>, Yixun Lan <dlan@...too.org>,
linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 1/2] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo
SG2044 uarts
On Mon, Oct 21, 2024 at 03:26:05PM +0800, Inochi Amaoto wrote:
> The UART of SG2044 is modified version of the standard Synopsys
> DesignWare UART. The UART on SG2044 relys on the internal divisor
> and can not set right clock rate for the common bitrates.
>
> Add compatibles string for the Sophgo SG2044 uarts.
>
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
> .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> index 4cdb0dcaccf3..6963f89a1848 100644
> --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> @@ -58,6 +58,10 @@ properties:
> - brcm,bcm11351-dw-apb-uart
> - brcm,bcm21664-dw-apb-uart
> - const: snps,dw-apb-uart
> + - items:
> + - enum:
> + - sophgo,sg2044-uart
> + - const: snps,dw-apb-uart
Why does each vendor have an items entry of its own? Seems like needless
clutter of the file IMO, except for the renesas bit.
Cheers,
Conor.
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