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Message-ID: <20241021121618.151079-1-y.oudjana@protonmail.com>
Date: Mon, 21 Oct 2024 15:16:14 +0300
From: Yassine Oudjana <yassine.oudjana@...il.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Lukas Bulwahn <lukas.bulwahn@...hat.com>,
Daniel Golle <daniel@...rotopia.org>,
Sam Shih <sam.shih@...iatek.com>
Cc: Yassine Oudjana <y.oudjana@...tonmail.com>,
Yassine Oudjana <yassine.oudjana@...il.com>,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 0/2] MediaTek MT6735 syscon clock/reset controller support
From: Yassine Oudjana <y.oudjana@...tonmail.com>
These patches are part of a larger effort to support the MT6735 SoC family
in mainline Linux. More patches can found here[1].
This series adds support for clocks and resets of the following blocks:
- IMGSYS (Camera)
- MFGCFG (GPU)
- VDECSYS (Video decoder)
- VENCSYS (Video encoder, also has JPEG codec clocks)
[1] https://gitlab.com/mt6735-mainline/linux/-/commits/mt6735-staging
Yassine Oudjana (2):
dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and
reset controllers
clk: mediatek: Add drivers for MT6735 syscon clock and reset
controllers
.../bindings/clock/mediatek,syscon.yaml | 4 +
MAINTAINERS | 10 +++
drivers/clk/mediatek/Kconfig | 32 ++++++++
drivers/clk/mediatek/Makefile | 4 +
drivers/clk/mediatek/clk-mt6735-imgsys.c | 57 +++++++++++++
drivers/clk/mediatek/clk-mt6735-mfgcfg.c | 61 ++++++++++++++
drivers/clk/mediatek/clk-mt6735-vdecsys.c | 81 +++++++++++++++++++
drivers/clk/mediatek/clk-mt6735-vencsys.c | 53 ++++++++++++
.../clock/mediatek,mt6735-imgsys.h | 15 ++++
.../clock/mediatek,mt6735-mfgcfg.h | 8 ++
.../clock/mediatek,mt6735-vdecsys.h | 9 +++
.../clock/mediatek,mt6735-vencsys.h | 11 +++
.../reset/mediatek,mt6735-mfgcfg.h | 9 +++
.../reset/mediatek,mt6735-vdecsys.h | 10 +++
14 files changed, 364 insertions(+)
create mode 100644 drivers/clk/mediatek/clk-mt6735-imgsys.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-mfgcfg.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-vdecsys.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-vencsys.c
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-imgsys.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vdecsys.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vencsys.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-mfgcfg.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
--
2.47.0
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