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Message-ID: <20241022-map-unsightly-fafb554b8f9b@spud>
Date: Tue, 22 Oct 2024 18:23:52 +0100
From: Conor Dooley <conor@...nel.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: Yassine Oudjana <yassine.oudjana@...il.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Lukas Bulwahn <lukas.bulwahn@...hat.com>,
	Daniel Golle <daniel@...rotopia.org>,
	Sam Shih <sam.shih@...iatek.com>,
	Yassine Oudjana <y.oudjana@...tonmail.com>,
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for
 MT6735 syscon clock and reset controllers

On Tue, Oct 22, 2024 at 11:36:20AM +0200, AngeloGioacchino Del Regno wrote:
> Il 21/10/24 18:56, Conor Dooley ha scritto:
> > On Mon, Oct 21, 2024 at 03:16:15PM +0300, Yassine Oudjana wrote:
> > > From: Yassine Oudjana <y.oudjana@...tonmail.com>
> > > 
> > > Add device tree bindings for syscon clock and reset controllers (IMGSYS,
> > > MFGCFG, VDECSYS and VENCSYS).
> > > 
> > > Signed-off-by: Yassine Oudjana <y.oudjana@...tonmail.com>
> > > ---
> > >   .../bindings/clock/mediatek,syscon.yaml           |  4 ++++
> > >   MAINTAINERS                                       |  6 ++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-imgsys.h    | 15 +++++++++++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-mfgcfg.h    |  8 ++++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-vdecsys.h   |  9 +++++++++
> > >   .../dt-bindings/clock/mediatek,mt6735-vencsys.h   | 11 +++++++++++
> > >   .../dt-bindings/reset/mediatek,mt6735-mfgcfg.h    |  9 +++++++++
> > >   .../dt-bindings/reset/mediatek,mt6735-vdecsys.h   | 10 ++++++++++
> > 
> > Is it really necessary to have individual files foe each of these? Seems
> > a bit extra, no?
> > 
> 
> It's only good for including smaller headers in each driver (and/or DT, but
> then the SoC DT will anyway include them all).
> 
> I'm fine with that, but I'm also fine with one header for clock and one for reset.
> 
> So.. Conor, it's however you prefer :-)

It's not worth respinning for, IMO, but I think having 8 and 9 line
header files for 2 definitions is silly.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>

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