linux-kernel - [PATCH v4 0/3] riscv: interrupt-controller: Add T-HEAD C900 ACLINT SSWI

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Message-ID: <20241022040218.450573-1-inochiama@gmail.com>
Date: Tue, 22 Oct 2024 12:02:14 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Chen Wang <unicorn_wang@...look.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Peter Zijlstra <peterz@...radead.org>,
	Inochi Amaoto <inochiama@...look.com>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
	Yangyu Chen <cyy@...self.name>,
	Hal Feng <hal.feng@...rfivetech.com>
Cc: Yixun Lan <dlan@...too.org>,
	Inochi Amaoto <inochiama@...il.com>,
	linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org
Subject: [PATCH v4 0/3] riscv: interrupt-controller: Add T-HEAD C900 ACLINT SSWI

New version of T-HEAD C920 implement a fully featured ACLINT[1] device
(This core is used by Sophgo SG2044). This ACLINT device provides a
SSWI field to support fast S-mode IPI. This SSWI device is like the
MSWI device in CLINT/ACLINT, but for S-mode. The only thing is different
from the draft is that the T-HEAD version SSWI needs to write 0 on the
SSWI address to clear the IPI.

Add full support for T-HEAD C900 SSWI device.

[1] https://github.com/riscv/riscv-aclint

Changed from v1:
1. patch 2: use computed reg offset to avoid uncessary reg additions
   when setting/clearing irq.
2. patch 2: fix mulitple format issues and improve some comments.
3. patch 2: disable cpu irq when CPU is stopped.

Changed from v2:
1. patch 2: add SXSTATUS.CLINTEE check for T-HEAD cores.
2. patch 2: add select GENERIC_IRQ_IPI_MUX in Kconfig

Changed from v3:
2. patch 2: add SMP depends in Kconfig

Inochi Amaoto (3):
  dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI
  irqchip: add T-HEAD C900 ACLINT SSWI driver
  riscv: defconfig: Enable T-HEAD C900 ACLINT SSWI drivers

 .../thead,c900-aclint-sswi.yaml               |  58 ++++++
 arch/riscv/configs/defconfig                  |   1 +
 drivers/irqchip/Kconfig                       |  12 ++
 drivers/irqchip/Makefile                      |   1 +
 drivers/irqchip/irq-thead-c900-aclint-sswi.c  | 176 ++++++++++++++++++
 include/linux/cpuhotplug.h                    |   1 +
 6 files changed, 249 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml
 create mode 100644 drivers/irqchip/irq-thead-c900-aclint-sswi.c

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2.47.0