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Message-Id: <172957511945.488725.15179296618283554454.b4-ty@kernel.org>
Date: Tue, 22 Oct 2024 11:01:59 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...nel.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Johan Hovold <johan+linaro@...nel.org>, 
 Abel Vesa <abel.vesa@...aro.org>
Cc: Krzysztof Kozlowski <krzk@...nel.org>, linux-arm-msm@...r.kernel.org, 
 linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, kernel test robot <lkp@...el.com>, 
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v3] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix
 X1E80100 resets entries


On Mon, 21 Oct 2024 16:53:28 +0300, Abel Vesa wrote:
> The PCIe 6a PHY is actually Gen4 4-lanes capable. So the gen4x4 compatible
> describes it. But according to the schema, currently the gen4x4 compatible
> doesn't require both PHY and PHY-nocsr resets, while the HW does. So fix
> that by adding the gen4x4 compatible alongside the gen4x2 one for the
> resets description.
> 
> 
> [...]

Applied, thanks!

[1/1] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix X1E80100 resets entries
      commit: 16fde3e076775d3b51f48d44d050746fbc9d638e

Best regards,
-- 
~Vinod



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