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Message-ID: <20241022105109.1906f524@xps-13>
Date: Tue, 22 Oct 2024 10:51:09 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Hui-Ping Chen <hpchen0nvt@...il.com>
Cc: richard@....at, vigneshr@...com, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, nikita.shubin@...uefel.me, arnd@...db.de,
vkoul@...nel.org, esben@...nix.com, linux-arm-kernel@...ts.infradead.org,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 2/2] mtd: rawnand: nuvoton: add new driver for the
Nuvoton MA35 SoC
Hi Hui-Ping,
> >> +
> >> +static int ma35_nand_write_page_hwecc(struct nand_chip *chip, const u8 *buf,
> >> + int oob_required, int page)
> >> +{
> > The hardware ECC engine should always be disabled by default.
> >
> > Then, in these helpers you should:
> > * enable the ECC engine
> > * do your things
> > * disable the ECC engine
>
> The ECC engine of the MA35 NAND controller cannot be turned on or off separately.
>
> The ECC engine is activated with the DMA,
>
> and it calculates and writes to the OOB during the transfer.
What about:
ECC Algorithm Enable Bit [23] ECCEN
This field is used to select the ECC algorithm for data
protecting. The BCH algorithm can correct 8 or 12 or 24 bits.
0 = BCH code encode/decode Disabled.
1 = BCH code encode/decode Enabled.
?
Thanks,
Miquèl
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