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Message-ID: <3a550c82-7099-4544-bdff-e1ea411b1636@collabora.com>
Date: Tue, 22 Oct 2024 11:04:59 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Yassine Oudjana <yassine.oudjana@...il.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
 Philipp Zabel <p.zabel@...gutronix.de>,
 Lukas Bulwahn <lukas.bulwahn@...hat.com>,
 Daniel Golle <daniel@...rotopia.org>, Sam Shih <sam.shih@...iatek.com>
Cc: Yassine Oudjana <y.oudjana@...tonmail.com>, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-mediatek@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: clock: mediatek: Add bindings for MT6735
 syscon clock and reset controllers

Il 21/10/24 14:16, Yassine Oudjana ha scritto:
> From: Yassine Oudjana <y.oudjana@...tonmail.com>
> 
> Add device tree bindings for syscon clock and reset controllers (IMGSYS,
> MFGCFG, VDECSYS and VENCSYS).
> 
> Signed-off-by: Yassine Oudjana <y.oudjana@...tonmail.com>
> ---
>   .../bindings/clock/mediatek,syscon.yaml           |  4 ++++
>   MAINTAINERS                                       |  6 ++++++
>   .../dt-bindings/clock/mediatek,mt6735-imgsys.h    | 15 +++++++++++++++
>   .../dt-bindings/clock/mediatek,mt6735-mfgcfg.h    |  8 ++++++++
>   .../dt-bindings/clock/mediatek,mt6735-vdecsys.h   |  9 +++++++++
>   .../dt-bindings/clock/mediatek,mt6735-vencsys.h   | 11 +++++++++++
>   .../dt-bindings/reset/mediatek,mt6735-mfgcfg.h    |  9 +++++++++
>   .../dt-bindings/reset/mediatek,mt6735-vdecsys.h   | 10 ++++++++++
>   8 files changed, 72 insertions(+)
>   create mode 100644 include/dt-bindings/clock/mediatek,mt6735-imgsys.h
>   create mode 100644 include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h
>   create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vdecsys.h
>   create mode 100644 include/dt-bindings/clock/mediatek,mt6735-vencsys.h
>   create mode 100644 include/dt-bindings/reset/mediatek,mt6735-mfgcfg.h
>   create mode 100644 include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
> 

..snip..

> diff --git a/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h b/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
> new file mode 100644
> index 0000000000000..90ad73af50a3f
> --- /dev/null
> +++ b/include/dt-bindings/reset/mediatek,mt6735-vdecsys.h
> @@ -0,0 +1,10 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +
> +#ifndef _DT_BINDINGS_RESET_MT6735_VDECSYS_H
> +#define _DT_BINDINGS_RESET_MT6735_VDECSYS_H
> +
> +#define MT6735_VDEC_RST0_VDEC			0
> +

Since you anyway have to send a new version, please remove this extra and
unneeded blank line for v2.

Anyway...

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>



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