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Message-ID: <5247ada7-78f1-49e3-8076-cd85386126d8@amd.com>
Date: Tue, 22 Oct 2024 08:03:21 -0500
From: Mario Limonciello <mario.limonciello@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: Hans de Goede <hdegoede@...hat.com>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
x86@...nel.org, "Gautham R . Shenoy" <gautham.shenoy@....com>,
Perry Yuan <perry.yuan@....com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-pm@...r.kernel.org,
platform-driver-x86@...r.kernel.org,
Shyam Sundar S K <Shyam-sundar.S-k@....com>
Subject: Re: [PATCH v3 03/14] x86/cpufeatures: add X86_FEATURE_WORKLOAD_CLASS
feature bit
On 10/22/2024 07:42, Borislav Petkov wrote:
> On Tue, Oct 15, 2024 at 04:36:34PM -0500, Mario Limonciello wrote:
>> From: Perry Yuan <perry.yuan@....com>
>>
>> Add new feature bit that indicates support for workload based
>> heuristic feedback to OS for scheduling decisions.
>> When the bit set, threads are classified during runtime into
>> enumerated classes. The classes represent thread performance/power
>> characteristics that may benefit from special scheduling behaviors.
>>
>> Signed-off-by: Perry Yuan <perry.yuan@....com>
>> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
>> ---
>> arch/x86/include/asm/cpufeatures.h | 1 +
>> arch/x86/kernel/cpu/scattered.c | 1 +
>> 2 files changed, 2 insertions(+)
>>
>> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
>> index cea1ed82aeb4..3e8e67b8ec7a 100644
>> --- a/arch/x86/include/asm/cpufeatures.h
>> +++ b/arch/x86/include/asm/cpufeatures.h
>> @@ -474,6 +474,7 @@
>> #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
>> #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */
>> #define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */
>> +#define X86_FEATURE_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
>
> As already discussed: X86_FEATURE_AMD_WORKLOAD_CLASS
>
Yes; v4 does this.
https://lore.kernel.org/linux-pm/20241021180252.3531-4-mario.limonciello@amd.com/T/#u
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