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Message-ID: <20241023195152.GE11151@noisy.programming.kicks-ass.net>
Date: Wed, 23 Oct 2024 21:51:52 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Boqun Feng <boqun.feng@...il.com>, Dirk Behme <dirk.behme@...il.com>,
	Lyude Paul <lyude@...hat.com>, rust-for-linux@...r.kernel.org,
	Danilo Krummrich <dakr@...hat.com>, airlied@...hat.com,
	Ingo Molnar <mingo@...hat.com>, will@...nel.org,
	Waiman Long <longman@...hat.com>, linux-kernel@...r.kernel.org,
	Miguel Ojeda <ojeda@...nel.org>,
	Alex Gaynor <alex.gaynor@...il.com>, wedsonaf@...il.com,
	Gary Guo <gary@...yguo.net>,
	Björn Roy Baron <bjorn3_gh@...tonmail.com>,
	Benno Lossin <benno.lossin@...ton.me>,
	Andreas Hindborg <a.hindborg@...sung.com>, aliceryhl@...gle.com,
	Trevor Gross <tmgross@...ch.edu>
Subject: Re: [POC 1/6] irq & spin_lock: Add counted interrupt
 disabling/enabling

On Wed, Oct 23, 2024 at 09:34:27PM +0200, Thomas Gleixner wrote:
> On Thu, Oct 17 2024 at 22:51, Boqun Feng wrote:
> Ideally you make that part of the preemption count. Bit 24-30 are free
> (or we can move them around as needed). That's deep enough and you get
> the debug sanity checking of the preemption counter for free (might need
> some extra debug for this...)

Urgh, so we've already had trouble that nested spinlocks bust through
the 0xff preempt mask (because lunacy). You sure you want to be this
stingy with bits?

We still have a few holes in pcpu_hot iirc.

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