linux-kernel - Re: [PATCH v2 1/4] ASoC: dt-bindings: wcd937x-sdw: Add static channel mapping support

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Message-ID: <qzjbiby7w6a7m4e324hdatgklmejlcxfwv7tszzfmdqahgrbu2@bcwsdlrpncxq>
Date: Wed, 23 Oct 2024 09:52:36 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>, 
	Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Vinod Koul <vkoul@...nel.org>, Bard Liao <yung-chuan.liao@...ux.intel.com>, 
	Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>, 
	Pierre-Louis Bossart <pierre-louis.bossart@...ux.dev>, Sanyog Kale <sanyog.r.kale@...el.com>, 
	linux-arm-msm@...r.kernel.org, linux-sound@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, quic_rohkumar@...cinc.com, kernel@...cinc.com
Subject: Re: [PATCH v2 1/4] ASoC: dt-bindings: wcd937x-sdw: Add static
 channel mapping support

On Wed, Oct 23, 2024 at 11:43:23AM +0530, Mohammad Rafi Shaik wrote:
> Add static channel mapping between master and slave rx/tx ports for
> Qualcomm wcd937x soundwire codec.
> 
> Currently, the channel mask for each soundwire port is hardcoded in the
> wcd937x-sdw driver, and the same channel mask value is configured in the
> soundwire master.
> 
> The Qualcomm boards like the QCM6490-IDP require different channel mask settings
> for the soundwire master and slave ports.

Different than what? Other wcd937x? Which are these?

> 
> With the introduction of the following channel mapping properties, it is now possible
> to configure the master channel mask directly from the device tree.
> 
> The qcom,tx-channel-mapping property specifies the static channel mapping between the slave
> and master tx ports in the order of slave port channels which is adc1, adc2, adc3, adc4,
> dmic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7.

I still don't get what is the channel here.

> 
> The qcom,rx-channel-mapping property specifies static channel mapping between the slave
> and master rx ports in the order of slave port channels which is hph_l, hph_r, clsh,
> comp_l, comp_r, lo, dsd_r, dsd_l.

And this description copies binding :/.

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

> 
> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
> ---
>  .../bindings/sound/qcom,wcd937x-sdw.yaml      | 36 +++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml
> index d3cf8f59cb23..a6bc9b391db0 100644
> --- a/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml
> +++ b/Documentation/devicetree/bindings/sound/qcom,wcd937x-sdw.yaml
> @@ -58,6 +58,38 @@ properties:
>      items:
>        enum: [1, 2, 3, 4, 5]
>  
> +  qcom,tx-channel-mapping:
> +    description: |
> +      Specifies static channel mapping between slave and master tx port
> +      channels.
> +      In the order of slave port channels which is adc1, adc2, adc3, adc4,
> +      dmic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7.
> +      ch_mask1 ==> bit mask value 1
> +      ch_mask2 ==> bit mask value 2
> +      ch_mask3 ==> bit mask value 4
> +      ch_mask4 ==> bit mask value 8
> +    $ref: /schemas/types.yaml#/definitions/uint8-array
> +    minItems: 8
> +    maxItems: 13

Why size is variable? This device has fixed amount of slave ports, I
think.

> +    items:
> +      enum: [1, 2, 4, 8]

What is the point of using bits if you cannot actually create a bit mask
out of it? Why this cannot be 7?

> +
> +  qcom,rx-channel-mapping:
> +    description: |
> +      Specifies static channels mapping between slave and master rx port
> +      channels.
> +      In the order of slave port channels, which is
> +      hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l.
> +      ch_mask1 ==> bit mask value 1
> +      ch_mask2 ==> bit mask value 2
> +      ch_mask3 ==> bit mask value 4
> +      ch_mask4 ==> bit mask value 8

and the value is what exactly? Index is channel, but what does "ch_mask4 ==> bit
mask value 8" mean? I don't understand this at all.

> +    $ref: /schemas/types.yaml#/definitions/uint8-array
> +    minItems: 8
> +    maxItems: 8
> +    items:
> +      enum: [1, 2, 4, 8]
> +
>  required:
>    - compatible
>    - reg
> @@ -74,6 +106,8 @@ examples:
>              compatible = "sdw20217010a00";
>              reg = <0 4>;
>              qcom,rx-port-mapping = <1 2 3 4 5>;
> +            qcom,rx-channel-mapping =  /bits/ 8 <0x01 0x02 0x01 0x01 0x02
> +                                                 0x01 0x01 0x02>;
>          };
>      };
>  
> @@ -85,6 +119,8 @@ examples:
>              compatible = "sdw20217010a00";
>              reg = <0 3>;
>              qcom,tx-port-mapping = <2 2 3 4>;
> +            qcom,tx-channel-mapping = /bits/ 8 <0x01 0x02 0x01 0x01 0x02 0x04
> +                                                0x04 0x08 0x01 0x02 0x04 0x8>;

Keep it consistent, e.g. everywhere without leading 0... actually not
sure why this is hex, either.

>          };
>      };
>  
> -- 
> 2.25.1
>