lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CABMQnVLT10=4Y0yKaRj5=wnAr9abTsyPkXmB2XJPfK8CmR368w@mail.gmail.com>
Date: Wed, 23 Oct 2024 09:07:37 +0900
From: Nobuhiro Iwamatsu <iwamatsu@...auri.org>
To: Philipp Rosenberger <p.rosenberger@...bus.com>
Cc: Alexandre Belloni <alexandre.belloni@...tlin.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-rtc@...r.kernel.org, 
	devicetree@...r.kernel.org, 
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>, Lino Sanfilippo <l.sanfilippo@...bus.com>
Subject: Re: [PATCH v2 2/2] rtc: pcf2127: make battery switch-over configurable

Hello,

2024年10月22日(火) 18:29 Philipp Rosenberger <p.rosenberger@...bus.com>:
>
> The battery switch-over function of the PCF2127, PCA2129 and PCF2129
> have the opposite default behavior as the PCF2131. If the PCF2131 is
> used as replacement for one of the others, the battery switch-over will
> be disabled.
>
> Add nxp,battery-switch-over as an optional devicetree property to configure
> the battery switch-over, battery low detection and extra power fail
> detection functions.
>
> The property reflects the value of the PWRMNG bits of the Control_3
> register.
>
> Signed-off-by: Philipp Rosenberger <p.rosenberger@...bus.com>
> ---
>  drivers/rtc/rtc-pcf2127.c | 61 +++++++++++++++++++++++++++++----------
>  1 file changed, 46 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> index 9c04c4e1a49c..812764b65b34 100644
> --- a/drivers/rtc/rtc-pcf2127.c
> +++ b/drivers/rtc/rtc-pcf2127.c
> @@ -48,6 +48,7 @@
>  #define PCF2127_BIT_CTRL3_BLF                  BIT(2)
>  #define PCF2127_BIT_CTRL3_BF                   BIT(3)
>  #define PCF2127_BIT_CTRL3_BTSE                 BIT(4)
> +#define PCF2127_BIT_CTRL3_PWRMNG_MASK          (BIT(5) | BIT(6) | BIT(7))
>  /* Time and date registers */
>  #define PCF2127_REG_TIME_BASE          0x03
>  #define PCF2127_BIT_SC_OSF                     BIT(7)
> @@ -529,6 +530,49 @@ static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
>         return devm_watchdog_register_device(dev, &pcf2127->wdd);
>  }
>
> +static int pcf2127_battery_init(struct device *dev, struct pcf2127 *pcf2127)
> +{
> +       u8 val = 0xff;
> +       int ret;
> +
> +       /*
> +        * Disable battery low/switch-over timestamp and interrupts.
> +        * Clear battery interrupt flags which can block new trigger events.
> +        * Note: This is the default chip behaviour but added to ensure
> +        * correct tamper timestamp and interrupt function.
> +        */
> +       ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
> +                                PCF2127_BIT_CTRL3_BTSE |
> +                                PCF2127_BIT_CTRL3_BIE |
> +                                PCF2127_BIT_CTRL3_BLIE, 0);
> +       if (ret) {
> +               dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
> +                       __func__);
> +               return ret;
> +       }
> +
> +       ret = device_property_read_u8(dev, "nxp,battery-switch-over", &val);
> +       if (ret < 0)
> +               return 0;
> +
> +       if (val > 7) {
> +               dev_warn(dev,
> +                        "%s: ignoring invalid value for nxp,battery-switch-over: %u\n",
> +                        __func__, val);
> +               return 0;
> +       };

Please remove ';' .
Otherwise

Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@...auri.org>

Best regards,
  Nobuhiro


-- 
Nobuhiro Iwamatsu
   iwamatsu at {nigauri.org / debian.org / kernel.org}
   GPG ID: 32247FBB40AD1FA6

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ