linux-kernel - [PATCH] arm64: dts: qcom: x1e80100: Route pcie5 MSIs to the GIC ITS

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Message-Id: <20241024161814.1827514-1-maz@kernel.org>
Date: Thu, 24 Oct 2024 17:18:14 +0100
From: Marc Zyngier <maz@...nel.org>
To: linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org
Cc: Sibi Sankar <quic_sibis@...cinc.com>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Abel Vesa <abel.vesa@...aro.org>,
	Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH] arm64: dts: qcom: x1e80100: Route pcie5 MSIs to the GIC ITS

There is no reason to use the PCIe root port widget for MSIs for
pcie5 while both pcie4 and pcie6a are enjoying the ITS.

This is specially useful when booting the kernel at EL2, as KVM
can then configure the ITS to have MSIs directly injected in guests
(since this machine has a GICv4.1 implementation).

Tested on a x1e001de devkit.

Signed-off-by: Marc Zyngier <maz@...nel.org>
Cc: Sibi Sankar <quic_sibis@...cinc.com>
Cc: Konrad Dybcio <konradybcio@...nel.org>
Cc: Abel Vesa <abel.vesa@...aro.org>
Cc: Johan Hovold <johan+linaro@...nel.org>
---
 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 3441d167a5cc..48f0ebd66863 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3281,6 +3281,8 @@ pcie5: pci@...0000 {
 			linux,pci-domain = <5>;
 			num-lanes = <2>;
 
+			msi-map = <0x0 &gic_its 0xd0000 0x10000>;
+
 			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
-- 
2.39.5