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Message-ID: <jm2t45wnp4gp7mxdz75rd3wszqnfnqjvw67p4wjq2hodatrdwd@6o4spqafmu55>
Date: Thu, 24 Oct 2024 09:18:16 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Inochi Amaoto <inochiama@...il.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, 
	Jiri Slaby <jirislaby@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>, Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, 
	Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto <inochiama@...look.com>, 
	linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 2/3] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo
 SG2044 uarts

On Thu, Oct 24, 2024 at 02:21:02PM +0800, Inochi Amaoto wrote:
> The UART of SG2044 is modified version of the standard Synopsys
> DesignWare UART. The UART on SG2044 relys on the internal divisor
> and can not set right clock rate for the common bitrates.
> 
> Add compatibles string for the Sophgo SG2044 uarts.
> 
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
>  Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Best regards,
Krzysztof


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