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Message-ID: <fh43vyo4oviet35jmihew5yew5ez3nyaqgsyntqtd7x7s5mdrv@ezpal3a4banw>
Date: Thu, 24 Oct 2024 12:20:00 +0200
From: Andi Shyti <andi.shyti@...nel.org>
To: Tyrone Ting <warp5tw@...il.com>
Cc: avifishman70@...il.com, tmaimon77@...il.com, tali.perry1@...il.com, 
	venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com, 
	andriy.shevchenko@...ux.intel.com, wsa@...nel.org, rand.sec96@...il.com, 
	wsa+renesas@...g-engineering.com, tali.perry@...oton.com, Avi.Fishman@...oton.com, 
	tomer.maimon@...oton.com, KWLIU@...oton.com, JJLIU0@...oton.com, kfting@...oton.com, 
	openbmc@...ts.ozlabs.org, linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 3/4] i2c: npcm: use i2c frequency table

Hi Tyrone,

...

> -	/* 100KHz and below: */
> -	if (bus_freq_hz <= I2C_MAX_STANDARD_MODE_FREQ) {
> -		sclfrq = src_clk_khz / (bus_freq_khz * 4);
> -
> -		if (sclfrq < SCLFRQ_MIN || sclfrq > SCLFRQ_MAX)
> -			return -EDOM;
> -
> -		if (src_clk_khz >= 40000)
> -			hldt = 17;
> -		else if (src_clk_khz >= 12500)
> -			hldt = 15;
> -		else
> -			hldt = 7;
> -	}
> -
> -	/* 400KHz: */
> -	else if (bus_freq_hz <= I2C_MAX_FAST_MODE_FREQ) {
> -		sclfrq = 0;
> +	switch (bus_freq_hz) {
> +	case I2C_MAX_STANDARD_MODE_FREQ:
> +		smb_timing = smb_timing_100khz;
> +		table_size = ARRAY_SIZE(smb_timing_100khz);
> +		break;
> +	case I2C_MAX_FAST_MODE_FREQ:
> +		smb_timing = smb_timing_400khz;
> +		table_size = ARRAY_SIZE(smb_timing_400khz);
>  		fast_mode = I2CCTL3_400K_MODE;
> -
> -		if (src_clk_khz < 7500)
> -			/* 400KHZ cannot be supported for core clock < 7.5MHz */
> -			return -EDOM;
> -
> -		else if (src_clk_khz >= 50000) {
> -			k1 = 80;
> -			k2 = 48;
> -			hldt = 12;
> -			dbnct = 7;
> -		}
> -
> -		/* Master or Slave with frequency > 25MHz */
> -		else if (src_clk_khz > 25000) {
> -			hldt = clk_coef(src_clk_khz, 300) + 7;
> -			k1 = clk_coef(src_clk_khz, 1600);
> -			k2 = clk_coef(src_clk_khz, 900);
> -		}
> -	}
> -
> -	/* 1MHz: */
> -	else if (bus_freq_hz <= I2C_MAX_FAST_MODE_PLUS_FREQ) {
> -		sclfrq = 0;
> +		break;
> +	case I2C_MAX_FAST_MODE_PLUS_FREQ:
> +		smb_timing = smb_timing_1000khz;
> +		table_size = ARRAY_SIZE(smb_timing_1000khz);
>  		fast_mode = I2CCTL3_400K_MODE;
> -
> -		/* 1MHZ cannot be supported for core clock < 24 MHz */
> -		if (src_clk_khz < 24000)
> -			return -EDOM;
> -
> -		k1 = clk_coef(src_clk_khz, 620);
> -		k2 = clk_coef(src_clk_khz, 380);
> -
> -		/* Core clk > 40 MHz */
> -		if (src_clk_khz > 40000) {
> -			/*
> -			 * Set HLDT:
> -			 * SDA hold time:  (HLDT-7) * T(CLK) >= 120
> -			 * HLDT = 120/T(CLK) + 7 = 120 * FREQ(CLK) + 7
> -			 */
> -			hldt = clk_coef(src_clk_khz, 120) + 7;
> -		} else {
> -			hldt = 7;
> -			dbnct = 2;
> -		}
> +		break;
> +	default:
> +		return -EINVAL;

There is here a slight change of behaiour which is not mentioned
in the commit log. Before the user could set a bus_freq_hz which
had to be <= I2C_MAX_..._MODE_FREQ, while now it has to be
precisely that.

Do we want to check what the user has set in the DTS?

(Or am I missing something?)

Thanks,
Andi

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