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Message-ID: <7f0987c6-5f44-47c4-ad98-d10700b32383@quicinc.com>
Date: Fri, 25 Oct 2024 23:41:53 +0530
From: Jyothi Kumar Seerapu <quic_jseerapu@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Vinod Koul <vkoul@...nel.org>,
"Rob
Herring" <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
"Conor
Dooley" <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
"Konrad Dybcio" <konradybcio@...nel.org>,
Andi Shyti <andi.shyti@...nel.org>,
"Sumit Semwal" <sumit.semwal@...aro.org>,
Christian König
<christian.koenig@....com>
CC: <cros-qcom-dts-watchers@...omium.org>, <linux-arm-msm@...r.kernel.org>,
<dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
<linux-media@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<linaro-mm-sig@...ts.linaro.org>, <quic_msavaliy@...cinc.com>,
<quic_vtanuku@...cinc.com>
Subject: Re: [PATCH v1 1/5] dt-bindings: dmaengine: qcom: gpi: Add additional
arg to dma-cell property
On 10/15/2024 7:01 PM, Krzysztof Kozlowski wrote:
> On 15/10/2024 14:07, Jyothi Kumar Seerapu wrote:
>> When high performance with multiple i2c messages in a single transfer
>> is required, employ Block Event Interrupt (BEI) to trigger interrupts
>> after specific messages transfer and the last message transfer,
>> thereby reducing interrupts.
>>
>> For each i2c message transfer, a series of Transfer Request Elements(TREs)
>> must be programmed, including config tre for frequency configuration,
>> go tre for holding i2c address and dma tre for holding dma buffer address,
>> length as per the hardware programming guide. For transfer using BEI,
>> multiple I2C messages may necessitate the preparation of config, go,
>> and tx DMA TREs. However, a channel TRE size of 64 is often insufficient,
>> potentially leading to failures due to inadequate memory space.
> Please kindly test the patches before you sent them. Upstream is not a
> testing service.
Sure, i will take care to test the required patches.
>
> Best regards,
> Krzysztof
>
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