linux-kernel - Re: [POC 1/6] irq & spin_lock: Add counted interrupt disabling/enabling

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20241025182830.GO14555@noisy.programming.kicks-ass.net>
Date: Fri, 25 Oct 2024 20:28:30 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Boqun Feng <boqun.feng@...il.com>, Dirk Behme <dirk.behme@...il.com>,
	Lyude Paul <lyude@...hat.com>, rust-for-linux@...r.kernel.org,
	Danilo Krummrich <dakr@...hat.com>, airlied@...hat.com,
	Ingo Molnar <mingo@...hat.com>, will@...nel.org,
	Waiman Long <longman@...hat.com>, linux-kernel@...r.kernel.org,
	Miguel Ojeda <ojeda@...nel.org>,
	Alex Gaynor <alex.gaynor@...il.com>, wedsonaf@...il.com,
	Gary Guo <gary@...yguo.net>,
	Björn Roy Baron <bjorn3_gh@...tonmail.com>,
	Benno Lossin <benno.lossin@...ton.me>,
	Andreas Hindborg <a.hindborg@...sung.com>, aliceryhl@...gle.com,
	Trevor Gross <tmgross@...ch.edu>
Subject: Re: [POC 1/6] irq & spin_lock: Add counted interrupt
 disabling/enabling

On Fri, Oct 25, 2024 at 05:04:15PM +0200, Thomas Gleixner wrote:
> On Thu, Oct 24 2024 at 14:57, Boqun Feng wrote:
> > On Thu, Oct 24, 2024 at 07:22:19PM +0200, Thomas Gleixner wrote:
> >> On Thu, Oct 24 2024 at 12:05, Peter Zijlstra wrote:
> >> > That is my only concern -- making insane code crash hard is good, making
> >> > it silently mostly work but cause random weirdness is not.
> >> 
> >> I wish we could come up with a lightweight check for that.
> >> 
> > Since the preempt part takes exactly one byte in the preempt counter,
> > maybe we could use a "incb + jo"?

probably something like:

	incb
	jno 1f
	ud2
1:

is best, something about forward branches being preferred or somesuch.
Anyway, if we want to use the same thing for the interrupt disable
depth, we need another byte, meaning we need to compress the
NEED_RESCHED, NMI and HARDIRQ masks into a single byte.

Might just be possible I suppose.