linux-kernel - Re: [PATCH v3 2/3] arm64: dts: qcom: x1e80100: Describe TLMM pins for SDC2

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Message-ID: <a282021f-5e61-480c-84c4-272049e28244@oss.qualcomm.com>
Date: Fri, 25 Oct 2024 20:34:19 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Abel Vesa <abel.vesa@...aro.org>, Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
Cc: Johan Hovold <johan@...nel.org>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: x1e80100: Describe TLMM pins for
 SDC2

On 22.10.2024 12:46 PM, Abel Vesa wrote:
> Describe the SDC2 default and sleep state pins configuration
> in TLMM. Do this in SoC dtsi file since they will be shared
> across multiple boards.
> 
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---

Not very useful on its own but okay..

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>

Konrad