linux-kernel - Re: [PATCH] irqchip: mips-gic: Handle case with cluster without CPU cores

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Message-Id: <4acb9693-ba68-4f09-a4da-677c8b1e583b@app.fastmail.com>
Date: Fri, 25 Oct 2024 21:47:18 +0100
From: "Jiaxun Yang" <jiaxun.yang@...goat.com>
To: "Gregory CLEMENT" <gregory.clement@...tlin.com>,
 "Aleksandar Rikalo" <arikalo@...il.com>,
 "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
 "Thomas Gleixner" <tglx@...utronix.de>
Cc: "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
 linux-kernel@...r.kernel.org,
 "Vladimir Kondratiev" <vladimir.kondratiev@...ileye.com>,
 Théo Lebrun <theo.lebrun@...tlin.com>,
 "Tawfik Bayouk" <tawfik.bayouk@...ileye.com>,
 "Thomas Petazzoni" <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH] irqchip: mips-gic: Handle case with cluster without CPU cores



在2024年10月25日十月 下午9:40，Gregory CLEMENT写道：
> Hi Jiaxun,
>
[...]
>> Is second cluster IOCU only?
>
> Yes indeed in EyeQ5, the second cluster is the place for many
> accelerator for vision that benefit of the L2 cache and of the coherency
> unit.

It makes sense to me then, that for the information. I just checked
IOCU only MPS release and indeed those special handling are necessary.

Reviewd-by: Jiaxun Yang <jiaxun.yang@...goat.com>

I think some initialisation to IOCU and L2C in second cluster is also
necessary, but I guess those are already done by firmware in your case?

Thanks
-- 
- Jiaxun