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Message-ID: <CAA8EJppOxbT+rY35yvYao0r5ezLkNAOtQu6wY8xPAJ5d0eKjvg@mail.gmail.com>
Date: Fri, 25 Oct 2024 08:47:44 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Tingguo Cheng <quic_tingguoc@...cinc.com>
Cc: quic_fenglinw@...cinc.com, quic_tingweiz@...cinc.com, kernel@...cinc.com,
Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: qcs615: Adds SPMI bus, PMIC and peripherals
On Fri, 25 Oct 2024 at 06:03, Tingguo Cheng <quic_tingguoc@...cinc.com> wrote:
>
>
>
> On 10/24/2024 10:11 PM, Dmitry Baryshkov wrote:
> > On Thu, Oct 24, 2024 at 04:09:48PM +0800, Tingguo Cheng wrote:
> >> Add SPMI bus arbiter and include pm8150.dtsi for PMIC peripherals in
> >> pmm6155au which is a variant of pm8150. The power key and volume do-
> >> wn key are controlled by PMIC PON hardware on pmm6155au.
> >>
> >> Signed-off-by: Tingguo Cheng <quic_tingguoc@...cinc.com>
> >> ---
> >> This patch depends on the patch series:
> >> - https://lore.kernel.org/all/20241022-add_initial_support_for_qcs615-v4-0-0a551c6dd342@quicinc.com/
> >> ---
> >> Changes in v2:
> >> - Include "pm8150.dtsi" for QCS615 PMIC instead of creating a new
> >> qcs615-pmic.dtsi in the case that pmm6155au is a variant of pm8150.
> >> - Fixed comments from community in V1.
> >> - Link to v1: https://lore.kernel.org/r/20241014-adds-spmi-pmic-peripherals-for-qcs615-v1-1-8a3c67d894d8@quicinc.com
> >> ---
> >> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 27 +++++++++++++++++++++++++++
> >> arch/arm64/boot/dts/qcom/qcs615.dtsi | 23 +++++++++++++++++++++++
> >> 2 files changed, 50 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> >> index ee6cab3924a6d71f29934a8debba3a832882abdd..71ea0cb32eebed713b2a80ab692b14fdb4bd0ce4 100644
> >> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> >> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> >> @@ -6,6 +6,7 @@
> >>
> >> #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> >> #include "qcs615.dtsi"
> >> +#include "pm8150.dtsi"
> >> / {
> >> model = "Qualcomm Technologies, Inc. QCS615 Ride";
> >> compatible = "qcom,qcs615-ride", "qcom,qcs615";
> >> @@ -210,6 +211,32 @@ &rpmhcc {
> >> clocks = <&xo_board_clk>;
> >> };
> >>
> >> +&spmi_bus {
> >> + pmm6155au_0: pmic@0 {
> >
> > There is a label already, please use it.
> Okay, then pm8150.
> >
> >> +
> >> + pon: pon@800 {
> >
> > No, use the label syntax instead of extending the node in-tree.
> Okay, I will use &lable instead.
> >
> >> +
> >> + /delete-property/ mode-bootloader;
> >> + /delete-property/ mode-recovery;
> >> +
> >> + pon_pwrkey: pwrkey {
> >> + status = "okay";
> >> + };
> >> +
> >> + pon_resin: resin {
> >> + linux,code = <KEY_VOLUMEDOWN>;
> >> + status = "okay";
> >> + };
> >> + };
> >> +
> >> + pmm6155au_0_gpios: gpio@...0 {};
> >
> > What for?
> Because the silk screen is pmm6155au, I'm thinking using this phandle
> name could be more accurate.
Could you please post /sys/kernel/debug/qcom_socinfo/pmic_* contents?
> >
> >> + };
> >> +
> >> + pmm6155au_1: pmic@1 {
> >> + status = "disabled";
> >
> > Why?
> qcs615-ride board only contains 1 PMIC on the board, this is the board
> settings.
PM8150 takes two USIDs, so this is not for the second PMIC, this is
for a part of the same PMIC.
> >
> >> + };
> >> +};
> >> +
> >> &uart0 {
> >> status = "okay";
> >> };
> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> >> index ac4c4c751da1fbb28865877555ba317677bc6bd2..3fc928913239cfc61c24d1b16c183b96f38e589d 100644
> >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> >
> > Don't mix SoC and board changes into a single patch, unless they are
> > really touching the same function. In this case they are not.
> Okay, will split into two patches.
> >
> >> @@ -517,6 +517,29 @@ sram@...0000 {
> >> reg = <0x0 0x0c3f0000 0x0 0x400>;
> >> };
> >>
> >> + spmi_bus: spmi@...0000 {
> >> + compatible = "qcom,spmi-pmic-arb";
> >> + reg = <0x0 0x0c440000 0x0 0x1100>,
> >> + <0x0 0x0c600000 0x0 0x2000000>,
> >> + <0x0 0x0e600000 0x0 0x100000>,
> >> + <0x0 0x0e700000 0x0 0xa0000>,
> >> + <0x0 0x0c40a000 0x0 0x26000>;
> >> + reg-names = "core",
> >> + "chnls",
> >> + "obsrvr",
> >> + "intr",
> >> + "cnfg";
> >> + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
> >> + interrupt-names = "periph_irq";
> >> + interrupt-controller;
> >> + #interrupt-cells = <4>;
> >> + #address-cells = <2>;
> >> + #size-cells = <0>;
> >> + cell-index = <0>;
> >> + qcom,channel = <0>;
> >> + qcom,ee = <0>;
> >> + };
> >> +
> >> intc: interrupt-controller@...00000 {
> >> compatible = "arm,gic-v3";
> >> reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */
> >>
> >> ---
> >> base-commit: de938618db2bafbe1a70c8fc43f06ccdd60364b2
> >> change-id: 20240929-adds-spmi-pmic-peripherals-for-qcs615-16ee53179a7d
> >> prerequisite-change-id: 20241022-add_initial_support_for_qcs615-2256f64a9c24:v4
> >> prerequisite-patch-id: 09782474af7eecf1013425fd34f9d2f082fb3616
> >> prerequisite-patch-id: 624720e543d7857e46d3ee49b8cea413772deb4c
> >> prerequisite-patch-id: 04ca722967256efddc402b7bab94136a5174b0b9
> >> prerequisite-patch-id: ab88a42ec69ad90e8509c9c5b7c6bdd595a7f783
> >> prerequisite-patch-id: 918724fafe43acaa4c4b980bfabe36e9c3212cd1
> >> prerequisite-patch-id: 3bd8edd83297815fcb1b81fcd891d3c14908442f
> >> prerequisite-patch-id: fc1cfec4ecd56e669c161c4d2c3797fc0abff0ae
> >>
> >> Best regards,
> >> --
> >> Tingguo Cheng <quic_tingguoc@...cinc.com>
> >>
> >
>
> --
> Thank you & BRs
> Tingguo
>
--
With best wishes
Dmitry
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