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Message-ID: <c94987ad-22fd-47f3-a353-8868fb4592a8@amd.com>
Date: Fri, 25 Oct 2024 05:47:42 -0500
From: "Kalra, Ashish" <ashish.kalra@....com>
To: Tom Lendacky <thomas.lendacky@....com>, linux-kernel@...r.kernel.org,
 x86@...nel.org
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
 Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
 Michael Roth <michael.roth@....com>, Nikunj A Dadhania <nikunj@....com>,
 Neeraj Upadhyay <Neeraj.Upadhyay@....com>
Subject: Re: [PATCH v4 3/8] x86/sev: Require the RMPREAD instruction after
 Zen4


On 10/23/2024 1:41 PM, Tom Lendacky wrote:
> Limit usage of the non-architectural RMP format to Zen3/Zen4 processors.
> The RMPREAD instruction, with architectural defined output, is available
> and should be used for RMP access beyond Zen4.
> 
> Signed-off-by: Tom Lendacky <thomas.lendacky@....com>
> ---
>  arch/x86/kernel/cpu/amd.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index fab5caec0b72..547bcdf50f1b 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -355,10 +355,15 @@ static void bsp_determine_snp(struct cpuinfo_x86 *c)
>  		/*
>  		 * RMP table entry format is not architectural and is defined by the
>  		 * per-processor PPR. Restrict SNP support on the known CPU models
> -		 * for which the RMP table entry format is currently defined for.
> +		 * for which the RMP table entry format is currently defined or for
> +		 * processors which support the architecturally defined RMPREAD
> +		 * instruction.
>  		 */
>  		if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
> -		    c->x86 >= 0x19 && snp_probe_rmptable_info()) {
> +		    (cpu_feature_enabled(X86_FEATURE_ZEN3) ||
> +		     cpu_feature_enabled(X86_FEATURE_ZEN4) ||
> +		     cpu_feature_enabled(X86_FEATURE_RMPREAD)) &&
> +		    snp_probe_rmptable_info()) {
>  			cc_platform_set(CC_ATTR_HOST_SEV_SNP);
>  		} else {
>  			setup_clear_cpu_cap(X86_FEATURE_SEV_SNP);

Reviewed-by: Ashish Kalra <ashish.kalra@....com>

Thanks,
Ashish

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