linux-kernel - [tip: x86/cpu] x86/cpufeatures: Add X86_FEATURE_AMD_HETEROGENEOUS

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Message-ID: <172993516748.1442.17782562564581072875.tip-bot2@tip-bot2>
Date: Sat, 26 Oct 2024 09:32:47 -0000
From: "tip-bot2 for Perry Yuan" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Perry Yuan <perry.yuan@....com>,
 Mario Limonciello <mario.limonciello@....com>,
 "Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject:
 [tip: x86/cpu] x86/cpufeatures: Add X86_FEATURE_AMD_HETEROGENEOUS_CORES

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     1ad466706671436994ec7e71305f44692fed989a
Gitweb:        https://git.kernel.org/tip/1ad466706671436994ec7e71305f44692fed989a
Author:        Perry Yuan <perry.yuan@....com>
AuthorDate:    Fri, 25 Oct 2024 12:14:56 -05:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Fri, 25 Oct 2024 20:31:16 +02:00

x86/cpufeatures: Add X86_FEATURE_AMD_HETEROGENEOUS_CORES

CPUID leaf 0x80000026 advertises core types with different efficiency
rankings.

Bit 30 indicates the heterogeneous core topology feature, if the bit
set, it means not all instances at the current hierarchical level have
the same core topology.

This is described in the AMD64 Architecture Programmers Manual Volume
2 and 3, doc ID #25493 and #25494.

Signed-off-by: Perry Yuan <perry.yuan@....com>
Co-developed-by: Mario Limonciello <mario.limonciello@....com>
Signed-off-by: Mario Limonciello <mario.limonciello@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/r/20241025171459.1093-3-mario.limonciello@amd.com
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kernel/cpu/scattered.c    | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index a71a403..1216a05 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -473,6 +473,7 @@
 #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
 #define X86_FEATURE_AMD_FAST_CPPC	(21*32 + 5) /* Fast CPPC */
+#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 1db2bb8..307a917 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
+	{ X86_FEATURE_AMD_HETEROGENEOUS_CORES,	CPUID_EAX,  30, 0x80000026, 0 },
 	{ 0, 0, 0, 0, 0 }
 };