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Message-ID: <kz6mquqituklmowemr2fbl6673frilqfxqan23l2mhnubfksr2@kuxj7dvvy5zv>
Date: Sat, 26 Oct 2024 21:58:24 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Gabor Juhos <j4g8y7@...il.com>
Cc: Bjorn Andersson <andersson@...nel.org>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, linux-arm-msm@...r.kernel.org, 
	linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/5] clk: qcom: gcc-ipq6018: remove alpha values from NSS
 Crypto PLL's config

On Fri, Oct 25, 2024 at 10:06:55PM +0200, Gabor Juhos wrote:
> 2024. 10. 25. 8:18 keltezéssel, Dmitry Baryshkov írta:
> > On Mon, Oct 21, 2024 at 10:21:59PM +0200, Gabor Juhos wrote:
> >> Since both the 'alpha' and 'alpha_hi' members of the configuration is
> >> initialized with zero values, the output rate of the PLL will be the
> >> same whether alpha mode is enabled or not.
> >>
> >> Remove the initialization of the alpha* members to make it clear that
> >> alpha mode is not required to get the desired output rate.
> >>
> >> While at it, also add a comment to indicate the frequency the PLL runs
> >> at with the current configuration.
> >>
> >> No functional changes, the PLL runs at 1.2 GHz both before and after
> >> the change.
> >>
> >> Tested on Xiaomi Mi Router AX1800 (IPQ6018, out-of-tree board).
> >>
> >> Signed-off-by: Gabor Juhos <j4g8y7@...il.com>
> >> ---
> >>  drivers/clk/qcom/gcc-ipq6018.c | 4 +---
> >>  1 file changed, 1 insertion(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/clk/qcom/gcc-ipq6018.c b/drivers/clk/qcom/gcc-ipq6018.c
> >> index ab0f7fc665a9790dd8edba0cf4b86c5c672a337d..d861191b0c85ccc105ac0e62d7a68210c621fc13 100644
> >> --- a/drivers/clk/qcom/gcc-ipq6018.c
> >> +++ b/drivers/clk/qcom/gcc-ipq6018.c
> >> @@ -4194,10 +4194,9 @@ static const struct alpha_pll_config ubi32_pll_config = {
> >>  	.test_ctl_hi_val = 0x4000,
> >>  };
> >>  
> >> +/* 1200 MHz configuration */
> >>  static const struct alpha_pll_config nss_crypto_pll_config = {
> >>  	.l = 0x32,
> >> -	.alpha = 0x0,
> >> -	.alpha_hi = 0x0,
> > 
> > I'd say this serves documentation purposes: zero alpha value
> 
> For me, setting 'alpha_en_mask' means that the alpha values will be used. If it
> is not set, then it means that the alpha values are getting ignored. If those
> will be ignored eventually, specifying even zero alpha values explicitly is
> pointless in my opinion.

Ack, it matches the behaviour by several other CLK drivers.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>


> 
> If we really need that for documentation purposes, the comment before the
> configuration can be changed to indicate that alpha values are not needed.
> 
> > 
> >>  	.config_ctl_val = 0x4001055b,
> >>  	.main_output_mask = BIT(0),
> >>  	.pre_div_val = 0x0,
> >> @@ -4206,7 +4205,6 @@ static const struct alpha_pll_config nss_crypto_pll_config = {
> >>  	.post_div_mask = GENMASK(11, 8),
> >>  	.vco_mask = GENMASK(21, 20),
> >>  	.vco_val = 0x0,
> >> -	.alpha_en_mask = BIT(24),
> > 
> > This is okay
> 
> Regards,
> Gabor

-- 
With best wishes
Dmitry

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