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Message-Id: <20241027143654.28474-7-l.rubusch@gmail.com>
Date: Sun, 27 Oct 2024 14:36:38 +0000
From: Lothar Rubusch <l.rubusch@...il.com>
To: robh@...nel.org,
	krzk+dt@...nel.org,
	a.fatoum@...gutronix.de
Cc: conor+dt@...nel.org,
	dinguyen@...nel.org,
	marex@...x.de,
	s.trumtrar@...gutronix.de,
	l.rubusch@...il.com,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCHv3 06/22] ARM: dts: socfpga: add missing cells properties

Binding requires size-cells and address-cells to be around for the SRAM.

Signed-off-by: Lothar Rubusch <l.rubusch@...il.com>
---
 arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi
index 7f7ac0dc1..4b19fad1e 100644
--- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi
@@ -684,6 +684,8 @@ nand: nand-controller@...90000 {
 
 		ocram: sram@...00000 {
 			compatible = "mmio-sram";
+			#address-cells = <1>;
+			#size-cells = <1>;
 			reg = <0xffe00000 0x40000>;
 		};
 
-- 
2.25.1


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