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Message-Id: <20241027-sar2130p-clocks-v5-0-ecad2a1432ba@linaro.org>
Date: Sun, 27 Oct 2024 03:24:39 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Taniya Das <quic_tdas@...cinc.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Kalpak Kawadkar <quic_kkawadka@...cinc.com>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: [PATCH v5 00/11] clk: qcom: add support for clock controllers on
the SAR2130P platform
Add support for the RPMh, TCSR, Global, Display and GPU clock
controllers as present on the Qualcomm SAR2130P platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
Changes in v5:
- Dropped the stray 'int ret' variable, leftover from the previous
cleanup.
- Link to v4: https://lore.kernel.org/r/20241026-sar2130p-clocks-v4-0-37100d40fadc@linaro.org
Changes in v4:
- Fixed commit message for the RPMh clocks patch to mention RF_CLK1
clock (Konrad)
- Link to v3: https://lore.kernel.org/r/20241025-sar2130p-clocks-v3-0-48f1842fd156@linaro.org
Changes in v3:
- Added rfclka1 to RPMh clocks for SAR2140P (Taniya)
- Added HLOS1_VOTE_MM_SNOC_MMU_TBU_HF0_GDSC,
HLOS1_VOTE_MM_SNOC_MMU_TBU_SF0_GDSC,
HLOS1_VOTE_TURING_MMU_TBU0_GDSC,
HLOS1_VOTE_TURING_MMU_TBU1_GDSC
(Taniya)
- Removed extra debug print in gpucc probe (Konrad)
- Link to v2: https://lore.kernel.org/r/20241021-sar2130p-clocks-v2-0-383e5eb123a2@linaro.org
Changes in v2:
- Dropped gcc_camera_hf_axi_clk, gcc_camera_sf_axi_clk,
gcc_qmip_camera_nrt_ahb_clk, gcc_qmip_camera_rt_ahb_clk,
gcc_iris_ss_hf_axi1_sreg, gcc_iris_ss_spd_axi1_sreg,
gcc_video_axi0_sreg and gcc_video_axi1_sreg clocks until corresponding
subsytems bringup (Taniya)
- Program GDSC_SLEEP_ENA_VOTE directly from the probe function (Taniya)
- Dropped sreg, BRANCH_HALT_POLL and collapse_sleep_mask patches
(Taniya)
- Dropped gcc_parent_data_4, gcc_parent_map_4, gcc_parent_data_5,
gcc_parent_map_5 (LKP)
- Link to v1: https://lore.kernel.org/r/20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org
---
Dmitry Baryshkov (9):
dt-bindings: clock: qcom,rpmhcc: Add SAR2130P compatible
dt-bindings: clock: qcom: document SAR2130P Global Clock Controller
dt-bindings: clock: qcom,sm8550-tcsr: Add SAR2130P compatible
dt-bindings: clock: qcom,sm8550-dispcc: Add SAR2130P compatible
clk: qcom: rcg2: add clk_rcg2_shared_floor_ops
clk: qcom: rpmh: add support for SAR2130P
clk: qcom: add support for GCC on SAR2130P
clk: qcom: tcsrcc-sm8550: add SAR2130P support
clk: qcom: dispcc-sm8550: enable support for SAR2130P
Konrad Dybcio (2):
dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles
clk: qcom: add SAR2130P GPU Clock Controller support
.../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
.../bindings/clock/qcom,sar2130p-gcc.yaml | 65 +
.../bindings/clock/qcom,sm8450-gpucc.yaml | 2 +
.../bindings/clock/qcom,sm8550-dispcc.yaml | 1 +
.../bindings/clock/qcom,sm8550-tcsr.yaml | 1 +
drivers/clk/qcom/Kconfig | 22 +-
drivers/clk/qcom/Makefile | 2 +
drivers/clk/qcom/clk-rcg.h | 1 +
drivers/clk/qcom/clk-rcg2.c | 48 +-
drivers/clk/qcom/clk-rpmh.c | 13 +
drivers/clk/qcom/dispcc-sm8550.c | 18 +-
drivers/clk/qcom/gcc-sar2130p.c | 2366 ++++++++++++++++++++
drivers/clk/qcom/gpucc-sar2130p.c | 502 +++++
drivers/clk/qcom/tcsrcc-sm8550.c | 18 +-
include/dt-bindings/clock/qcom,sar2130p-gcc.h | 185 ++
include/dt-bindings/clock/qcom,sar2130p-gpucc.h | 33 +
include/dt-bindings/reset/qcom,sar2130p-gpucc.h | 14 +
17 files changed, 3281 insertions(+), 11 deletions(-)
---
base-commit: f6202e7cb4762be30b01ca4e1666512171c16d2a
change-id: 20241017-sar2130p-clocks-5fbdd9bf04ee
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
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