| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <pe2ornjaqn24i7e3x64rfdtqbp2c347mc5okgj5y6bfvkwnv6z@jux5yei3vxxa>
Date: Sun, 27 Oct 2024 23:47:19 +0100
From: Ondřej Jirman <megi@....cz>
To: Chen-Yu Tsai <wens@...nel.org>
Cc: Heiko Stuebner <heiko@...ech.de>, Chen-Yu Tsai <wens@...e.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: orangepi-5-plus: Enable USB 3.0
ports
Hello Chen-Yu,
On Sat, Oct 26, 2024 at 01:54:15AM GMT, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@...e.org>
>
> The Orange Pi 5 Plus has its first USB 3.0 interface on the SoC wired
> directly to the USB type C port next to the MASKROM button, and the
> second interface wired to a USB 3.0 hub which in turn is connected to
> the USB 3.0 host ports on the board, as well as the USB 2.0 connection
> on the M.2 E-key slot.
>
> Signed-off-by: Chen-Yu Tsai <wens@...e.org>
CCing the DTS author would be nice. :)
Thanks for submitting this. I found a few issues. See below:
> ---
> .../dts/rockchip/rk3588-orangepi-5-plus.dts | 132 ++++++++++++++++++
> 1 file changed, 132 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
> index dd03c9db6953..b826c5e368aa 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
> @@ -177,6 +177,18 @@ daicodec: simple-audio-card,codec {
> };
> };
>
> + vbus_typec: vbus-typec-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&typec5v_pwren>;
> + regulator-name = "vbus_typec";
This is named vbus5v0_typec in the schematic.
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> vcc3v3_pcie30: vcc3v3-pcie30-regulator {
> compatible = "regulator-fixed";
> enable-active-high;
> @@ -339,6 +351,56 @@ &i2c6 {
> clock-frequency = <400000>;
> status = "okay";
>
> + usbc0: usb-typec@22 {
> + compatible = "fcs,fusb302";
> + reg = <0x22>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&usbc0_int>;
> + vbus-supply = <&vbus_typec>;
> + status = "okay";
> +
> + usb_con: connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + data-role = "dual";
> + op-sink-microwatt = <1000000>;
> + power-role = "dual";
> + sink-pdos =
> + <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
The board can't sink power from this port. It's a source only port. So sink-pdos
can be lower, so that if you plug this into type-c hub as a peripheral, the hub
doesn't need to reserve 5W for this port.
op-sink-microwat can also be lower. The port will not sink any power when
connected to 5V VBUS externally.
Otherwise you can probably keep power-role = "dual";
> + source-pdos =
> + <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
This port can't source 3A. U22 (SY6280AAC) is configured via Rset for 1.44A
limit. So let's say 1.5A.
> + try-power-role = "source";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + usbc0_hs: endpoint {
> + remote-endpoint = <&usb_host0_xhci_drd_sw>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + usbc0_ss: endpoint {
> + remote-endpoint = <&usbdp_phy0_typec_ss>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + usbc0_sbu: endpoint {
> + remote-endpoint = <&usbdp_phy0_typec_sbu>;
> + };
> + };
> + };
> + };
> + };
> +
> hym8563: rtc@51 {
> compatible = "haoyu,hym8563";
> reg = <0x51>;
> @@ -480,6 +542,16 @@ vcc5v0_usb20_en: vcc5v0-usb20-en {
> rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
> +
> + usb-typec {
> + usbc0_int: usbc0-int {
> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + typec5v_pwren: typec5v-pwren {
> + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> };
>
> &pwm2 {
> @@ -871,6 +943,22 @@ &tsadc {
> status = "okay";
> };
>
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy0_otg {
> + status = "okay";
> +};
> +
> +&u2phy1 {
> + status = "okay";
> +};
> +
> +&u2phy1_otg {
Needs:
phy-supply = <&vcc5v0_host>;
> + status = "okay";
> +};
> +
> &u2phy2 {
> status = "okay";
> };
> @@ -899,6 +987,33 @@ &uart9 {
> status = "okay";
> };
>
> +&usbdp_phy0 {
> + mode-switch;
> + orientation-switch;
> + sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
> + sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + usbdp_phy0_typec_ss: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&usbc0_ss>;
> + };
> +
> + usbdp_phy0_typec_sbu: endpoint@1 {
> + reg = <1>;
> + remote-endpoint = <&usbc0_sbu>;
> + };
> + };
> +};
> +
> +&usbdp_phy1 {
> + status = "okay";
> +};
> +
> &usb_host0_ehci {
> status = "okay";
> };
> @@ -907,6 +1022,18 @@ &usb_host0_ohci {
> status = "okay";
> };
>
> +&usb_host0_xhci {
> + dr_mode = "otg";
This is the default. No need to have it here.
Kind regards,
o.
> + usb-role-switch;
> + status = "okay";
> +
> + port {
> + usb_host0_xhci_drd_sw: endpoint {
> + remote-endpoint = <&usbc0_hs>;
> + };
> + };
> +};
> +
> &usb_host1_ehci {
> status = "okay";
> };
> @@ -915,6 +1042,11 @@ &usb_host1_ohci {
> status = "okay";
> };
>
> +&usb_host1_xhci {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> &vop_mmu {
> status = "okay";
> };
> --
> 2.39.5
>
Powered by blists - more mailing lists