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Message-ID: <20241028160917.1380714-1-alexander.shishkin@linux.intel.com> Date: Mon, 28 Oct 2024 18:07:48 +0200 From: Alexander Shishkin <alexander.shishkin@...ux.intel.com> To: Andy Lutomirski <luto@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>, Peter Zijlstra <peterz@...radead.org>, Ard Biesheuvel <ardb@...nel.org>, "Paul E. McKenney" <paulmck@...nel.org>, Josh Poimboeuf <jpoimboe@...nel.org>, Xiongwei Song <xiongwei.song@...driver.com>, Xin Li <xin3.li@...el.com>, "Mike Rapoport (IBM)" <rppt@...nel.org>, Brijesh Singh <brijesh.singh@....com>, Michael Roth <michael.roth@....com>, Tony Luck <tony.luck@...el.com>, "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>, Alexey Kardashevskiy <aik@....com> Cc: Jonathan Corbet <corbet@....net>, Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Sohil Mehta <sohil.mehta@...el.com>, Ingo Molnar <mingo@...nel.org>, Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, Daniel Sneddon <daniel.sneddon@...ux.intel.com>, Kai Huang <kai.huang@...el.com>, Sandipan Das <sandipan.das@....com>, Breno Leitao <leitao@...ian.org>, Rick Edgecombe <rick.p.edgecombe@...el.com>, Alexei Starovoitov <ast@...nel.org>, Hou Tao <houtao1@...wei.com>, Juergen Gross <jgross@...e.com>, Vegard Nossum <vegard.nossum@...cle.com>, Kees Cook <kees@...nel.org>, Eric Biggers <ebiggers@...gle.com>, Jason Gunthorpe <jgg@...pe.ca>, "Masami Hiramatsu (Google)" <mhiramat@...nel.org>, Andrew Morton <akpm@...ux-foundation.org>, Luis Chamberlain <mcgrof@...nel.org>, Yuntao Wang <ytcoode@...il.com>, Rasmus Villemoes <linux@...musvillemoes.dk>, Christophe Leroy <christophe.leroy@...roup.eu>, Tejun Heo <tj@...nel.org>, Changbin Du <changbin.du@...wei.com>, Huang Shijie <shijie@...amperecomputing.com>, Geert Uytterhoeven <geert+renesas@...der.be>, Namhyung Kim <namhyung@...nel.org>, Arnaldo Carvalho de Melo <acme@...hat.com>, linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org, linux-efi@...r.kernel.org Subject: [PATCH v5 00/16] Enable Linear Address Space Separation support Changes from v4[8]: - Added PeterZ's Originally-by and SoB to 2/16 - Added lass_clac()/lass_stac() to differentiate from SMAP necessitated clac()/stac() and to be NOPs on CPUs that don't support LASS - Moved LASS enabling patch to the end to avoid rendering machines unbootable between until the patch that disables LASS around EFI initialization - Reverted Pawan's LAM disabling commit Changes from v3[6]: - Made LAM dependent on LASS - Moved EFI runtime initialization to x86 side of things - Suspended LASS validation around EFI set_virtual_address_map call - Added a message for the case of kernel side LASS violation - Moved inline memset/memcpy versions to the common string.h Changes from v2[5]: - Added myself to the SoB chain Changes from v1[1]: - Emulate vsyscall violations in execute mode in the #GP fault handler - Use inline memcpy and memset while patching alternatives - Remove CONFIG_X86_LASS - Make LASS depend on SMAP - Dropped the minimal KVM enabling patch Linear Address Space Separation (LASS) is a security feature that intends to prevent malicious virtual address space accesses across user/kernel mode. Such mode based access protection already exists today with paging and features such as SMEP and SMAP. However, to enforce these protections, the processor must traverse the paging structures in memory. Malicious software can use timing information resulting from this traversal to determine details about the paging structures, and these details may also be used to determine the layout of the kernel memory. The LASS mechanism provides the same mode-based protections as paging but without traversing the paging structures. Because the protections enforced by LASS are applied before paging, software will not be able to derive paging-based timing information from the various caching structures such as the TLBs, mid-level caches, page walker, data caches, etc. LASS can avoid probing using double page faults, TLB flush and reload, and SW prefetch instructions. See [2], [3] and [4] for some research on the related attack vectors. In addition, LASS prevents an attack vector described in a Spectre LAM (SLAM) whitepaper [7]. LASS enforcement relies on the typical kernel implemetation to divide the 64-bit virtual address space into two halves: Addr[63]=0 -> User address space Addr[63]=1 -> Kernel address space Any data access or code execution across address spaces typically results in a #GP fault. Kernel accesses usually only happen to the kernel address space. However, there are valid reasons for kernel to access memory in the user half. For these cases (such as text poking and EFI runtime accesses), the kernel can temporarily suspend the enforcement of LASS by toggling SMAP (Supervisor Mode Access Prevention) using the stac()/clac() instructions and in one instance a downright disabling LASS for an EFI runtime call. User space cannot access any kernel address while LASS is enabled. Unfortunately, legacy vsyscall functions are located in the address range 0xffffffffff600000 - 0xffffffffff601000 and emulated in kernel. To avoid breaking user applications when LASS is enabled, extend the vsyscall emulation in execute (XONLY) mode to the #GP fault handler. In contrast, the vsyscall EMULATE mode is deprecated and not expected to be used by anyone. Supporting EMULATE mode with LASS would need complex intruction decoding in the #GP fault handler and is probably not worth the hassle. Disable LASS in this rare case when someone absolutely needs and enables vsyscall=emulate via the command line. [1] https://lore.kernel.org/lkml/20230110055204.3227669-1-yian.chen@intel.com/ [2] “Practical Timing Side Channel Attacks against Kernel Space ASLR”, https://www.ieee-security.org/TC/SP2013/papers/4977a191.pdf [3] “Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR”, http://doi.acm.org/10.1145/2976749.2978356 [4] “Harmful prefetch on Intel”, https://ioactive.com/harmful-prefetch-on-intel/ (H/T Anders) [5] https://lore.kernel.org/all/20230530114247.21821-1-alexander.shishkin@linux.intel.com/ [6] https://lore.kernel.org/all/20230609183632.48706-1-alexander.shishkin@linux.intel.com/ [7] https://download.vusec.net/papers/slam_sp24.pdf [8] https://lore.kernel.org/all/20240710160655.3402786-1-alexander.shishkin@linux.intel.com/ Alexander Shishkin (7): init/main.c: Move EFI runtime service initialization to x86/cpu x86/cpu: Defer CR pinning setup until after EFI initialization efi: Disable LASS around set_virtual_address_map call x86/vsyscall: Document the fact that vsyscall=emulate disables LASS x86/traps: Communicate a LASS violation in #GP message x86/cpu: Make LAM depend on LASS Revert "x86/lam: Disable ADDRESS_MASKING in most cases" Peter Zijlstra (1): x86/asm: Introduce inline memcpy and memset Sohil Mehta (7): x86/cpu: Enumerate the LASS feature bits x86/alternatives: Disable LASS when patching kernel alternatives x86/vsyscall: Reorganize the #PF emulation code x86/traps: Consolidate user fixups in exc_general_protection() x86/vsyscall: Add vsyscall emulation for #GP x86/vsyscall: Disable LASS if vsyscall mode is set to EMULATE x86/cpu: Enable LASS during CPU initialization Yian Chen (1): x86/cpu: Set LASS CR4 bit as pinning sensitive .../admin-guide/kernel-parameters.txt | 4 +- arch/x86/Kconfig | 1 - arch/x86/entry/vsyscall/vsyscall_64.c | 61 +++++++++++++------ arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/disabled-features.h | 4 +- arch/x86/include/asm/smap.h | 18 ++++++ arch/x86/include/asm/string.h | 26 ++++++++ arch/x86/include/asm/vsyscall.h | 14 +++-- arch/x86/include/uapi/asm/processor-flags.h | 2 + arch/x86/kernel/alternative.c | 12 +++- arch/x86/kernel/cpu/common.c | 25 +++++++- arch/x86/kernel/cpu/cpuid-deps.c | 2 + arch/x86/kernel/traps.c | 26 +++++--- arch/x86/mm/fault.c | 2 +- arch/x86/platform/efi/efi.c | 13 ++++ init/main.c | 5 -- tools/arch/x86/include/asm/cpufeatures.h | 1 + 17 files changed, 171 insertions(+), 46 deletions(-) -- 2.45.2
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