linux-kernel - Re: [PATCH v1 2/5] arm64: dts: qcom: Add support for configuring channel TRE size

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <fba6241e-fe9d-488f-9280-4efb244c6464@quicinc.com>
Date: Mon, 28 Oct 2024 11:04:43 +0530
From: Jyothi Kumar Seerapu <quic_jseerapu@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
        Bjorn Andersson
	<andersson@...nel.org>
CC: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh@...nel.org>,
        "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "Konrad
 Dybcio" <konradybcio@...nel.org>,
        Andi Shyti <andi.shyti@...nel.org>,
        "Sumit
 Semwal" <sumit.semwal@...aro.org>,
        Christian König
	<christian.koenig@....com>,
        <cros-qcom-dts-watchers@...omium.org>, <linux-arm-msm@...r.kernel.org>,
        <dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
        <linux-media@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <linaro-mm-sig@...ts.linaro.org>, <quic_msavaliy@...cinc.com>,
        <quic_vtanuku@...cinc.com>
Subject: Re: [PATCH v1 2/5] arm64: dts: qcom: Add support for configuring
 channel TRE size



On 10/17/2024 12:40 PM, Krzysztof Kozlowski wrote:
> On 16/10/2024 16:35, Bjorn Andersson wrote:
>>>> @@ -1064,7 +1064,7 @@
>>>>   		};
>>>>   
>>>>   		gpi_dma0: dma-controller@...000 {
>>>> -			#dma-cells = <3>;
>>>> +			#dma-cells = <4>;
>>>>   			compatible = "qcom,sc7280-gpi-dma", "qcom,sm6350-gpi-dma";
>>>>   			reg = <0 0x00900000 0 0x60000>;
>>>>   			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
>>>> @@ -1114,8 +1114,8 @@
>>>>   							"qup-memory";
>>>>   				power-domains = <&rpmhpd SC7280_CX>;
>>>>   				required-opps = <&rpmhpd_opp_low_svs>;
>>>> -				dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
>>>> -				       <&gpi_dma0 1 0 QCOM_GPI_I2C>;
>>>> +				dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C 64>,
>>>> +				       <&gpi_dma0 1 0 QCOM_GPI_I2C 64>;
>>>
>>> So everywhere is 64, thus this is fixed. Deduce it from the compatible
>>>
>>
>> If I understand correctly, it's a software tunable property, used to
>> balance how many TRE elements that should be preallocated.
>>
>> If so, it would not be a property of the hardware/compatible, but rather
>> a result of profiling and a balance between memory "waste" and
>> performance.
> 
> In such case I would prefer it being runtime-calculated by the driver,
> based on frequency or expected bandwidth.
> 
> And in any case if this is about to stay, having here default values
> means all upstream users don't need it. What's not upstream, does not
> exist in such context. We don't add features which are not used by upstream.
> 
> Best regards,
> Krzysztof
> 

Thanks Krzysztof and Bjorn for the review comments.

I have reverted the changes of supporting channel tre size from DT and 
will make use of existing channel tre size defined in GPI driver which 
is 64.

Regards,
JyothiKumar.