[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20241028071746.869740-1-inochiama@gmail.com>
Date: Mon, 28 Oct 2024 15:17:40 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Jonathan Corbet <corbet@....net>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Conor Dooley <conor@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Clément Léger <cleger@...osinc.com>,
Evan Green <evan@...osinc.com>,
Charlie Jenkins <charlie@...osinc.com>,
Andrew Jones <ajones@...tanamicro.com>,
Andy Chiu <andybnac@...il.com>,
Inochi Amaoto <inochiama@...il.com>,
Xiao Wang <xiao.w.wang@...el.com>,
Samuel Holland <samuel.holland@...ive.com>
Cc: linux-doc@...r.kernel.org,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: [PATCH 0/3] riscv: Add bfloat16 instruction support
Add description for the BFloat16 precision Floating-Point ISA extension,
(Zfbfmin, Zvfbfmin, Zvfbfwma). which was ratified in commit 4dc23d62
("Added Chapter title to BF16") of the riscv-isa-manual.
Inochi Amaoto (3):
dt-bindings: riscv: add bfloat16 ISA extension description
riscv: add ISA extension parsing for bfloat16 ISA extension
riscv: hwprobe: export bfloat16 ISA extension
Documentation/arch/riscv/hwprobe.rst | 12 +++++
.../devicetree/bindings/riscv/extensions.yaml | 45 +++++++++++++++++++
arch/riscv/include/asm/hwcap.h | 3 ++
arch/riscv/include/uapi/asm/hwprobe.h | 3 ++
arch/riscv/kernel/cpufeature.c | 3 ++
5 files changed, 66 insertions(+)
--
2.47.0
Powered by blists - more mailing lists