linux-kernel - Re: [PATCH -next v4 01/19] arm64: ptrace: Replace interrupts_enabled() with regs_irqs

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Message-ID: <ZyDu9XHNmxMHBMSI@J2N7QTR9R3.cambridge.arm.com>
Date: Tue, 29 Oct 2024 14:19:33 +0000
From: Mark Rutland <mark.rutland@....com>
To: Jinjie Ruan <ruanjinjie@...wei.com>
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Subject: Re: [PATCH -next v4 01/19] arm64: ptrace: Replace
 interrupts_enabled() with regs_irqs_disabled()

On Fri, Oct 25, 2024 at 06:06:42PM +0800, Jinjie Ruan wrote:
> Implement regs_irqs_disabled(), and replace interrupts_enabled() macro
> with regs_irqs_disabled() all over the place.
> 
> No functional changes.
> 

Please say why, e.g.

| The generic entry code expects architecture code to provide
| regs_irqs_disabled(regs), but arm64 does not have this and provides
| interrupts_enabled(regs), which has the opposite polarity.
| 
| In preparation for moving arm64 over to the generic entry code,
| replace arm64's interrupts_enabled() with regs_irqs_disabled() and
| update its callers under arch/arm64.
|
| For the moment, a definition of interrupts_enabled() is provided for
| the GICv3 driver. Once arch/arm implement regs_irqs_disabled(), this
| can be removed.

> Suggested-by: Mark Rutland <mark.rutland@....com>
> Signed-off-by: Jinjie Ruan <ruanjinjie@...wei.com>
> ---

[...]

>  arch/arm/include/asm/ptrace.h       | 4 ++--
>  arch/arm/kernel/hw_breakpoint.c     | 2 +-
>  arch/arm/kernel/process.c           | 2 +-
>  arch/arm/mm/alignment.c             | 2 +-
>  arch/arm/mm/fault.c                 | 2 +-

>  drivers/irqchip/irq-gic-v3.c        | 2 +-

I hadn't realised that the GICv3 driver was using this and hence we'd
need to update a few places in arch/arm at the same time. Please update
just the arch/arm64 bits, and add:

| /* 
|  * Used by the GICv3 driver, can be removed once arch/arm implements
|  * regs_irqs_disabled() directly.
|  */
| #define interrupts_enabled(regs)	(!regs_irqs_disabled(regs))

... and then once 32-bit arm implements this we can update the GIC
driver and remove the architecture definitions.

That way we avoid the risk of conflicts with 32-bit arm.

Mark.