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Message-ID: <139a7fb4-124a-4d0e-b1a1-32f8d2fb65f2@baylibre.com>
Date: Tue, 29 Oct 2024 14:08:15 -0500
From: David Lechner <dlechner@...libre.com>
To: Angelo Dureghello <angelo@...nel-space.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Michael Hennerich <Michael.Hennerich@...log.com>,
Nuno Sá <nuno.sa@...log.com>,
Jonathan Cameron <jic23@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Olivier Moysan <olivier.moysan@...s.st.com>
Cc: linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Mark Brown <broonie@...nel.org>,
Angelo Dureghello <adureghello@...libre.com>,
Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v9 0/8] iio: add support for the ad3552r AXI DAC IP
On 10/28/24 4:45 PM, Angelo Dureghello wrote:
> Purpose is to add ad3552r AXI DAC (fpga-based) support.
>
> The "ad3552r" AXI IP, a variant of the generic "DAC" AXI IP,
> has been created to reach the maximum speed (33MUPS) supported
> from the ad3552r. To obtain the maximum transfer rate, a custom
> IP core module has been implemented with a QSPI interface with
> DDR (Double Data Rate) mode.
>
> The design is actually using the DAC backend since the register
> map is the same of the generic DAC IP, except for some customized
> bitfields. For this reason, a new "compatible" has been added
> in adi-axi-dac.c.
>
> Also, backend has been extended with all the needed functions
> for this use case, keeping the names gneric.
>
> The following patch is actually applying to linux-iio/testing.
>
> ---
Reviewed-by: David Lechner <dlechner@...libre.com>
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