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Message-ID: <ZyE3qjpOXJYPRVlX@debug.ba.rivosinc.com>
Date: Tue, 29 Oct 2024 12:29:46 -0700
From: Deepak Gupta <debug@...osinc.com>
To: Max Hsu <max.hsu@...ive.com>
Cc: Conor Dooley <conor@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Anup Patel <anup@...infault.org>,
	Atish Patra <atishp@...shpatra.org>,
	Palmer Dabbelt <palmer@...ive.com>, linux-riscv@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org,
	Samuel Holland <samuel.holland@...ive.com>
Subject: Re: [PATCH RFC 2/3] riscv: Add Svukte extension support

On Fri, Sep 20, 2024 at 03:39:04PM +0800, Max Hsu wrote:
>Svukte extension introduce senvcfg.UKTE, hstatus.HUKTE.
>
>This patch add CSR bit definition, and detects if Svukte ISA extension
>is available, cpufeature will set the correspond bit field so the
>svukte-qualified memory accesses are protected in a manner that is
>timing-independent of the faulting virtual address.
>
>Since hstatus.HU is not enabled by linux, enabling hstatus.HUKTE will
>not be affective.
>
>This patch depends on patch "riscv: Per-thread envcfg CSR support" [1]
>
>Link: https://lore.kernel.org/linux-riscv/20240814081126.956287-1-samuel.holland@sifive.com/ [1]
>
>Reviewed-by: Samuel Holland <samuel.holland@...ive.com>
>Signed-off-by: Max Hsu <max.hsu@...ive.com>
>---
> arch/riscv/include/asm/csr.h   | 2 ++
> arch/riscv/include/asm/hwcap.h | 1 +
> arch/riscv/kernel/cpufeature.c | 4 ++++
> 3 files changed, 7 insertions(+)

Reviewed-by: Deepak Gupta <debug@...osinc.com>


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