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Message-ID: <avz4crm2yrk3fg7r4qxkgkt3ka5hmk54v2wtcms453tsnewu5w@jzjxmyd4b7yg>
Date: Tue, 29 Oct 2024 08:03:08 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Aleksandar Rikalo <arikalo@...il.com>
Cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>, 
	Gregory CLEMENT <gregory.clement@...tlin.com>, Theo Lebrun <theo.lebrun@...tlin.com>, 
	Arnd Bergmann <arnd@...db.de>, devicetree@...r.kernel.org, 
	Djordje Todorovic <djordje.todorovic@...cgroup.com>, Chao-ying Fu <cfu@...ecomp.com>, 
	Daniel Lezcano <daniel.lezcano@...aro.org>, Geert Uytterhoeven <geert@...ux-m68k.org>, 
	Greg Ungerer <gerg@...nel.org>, Hauke Mehrtens <hauke@...ke-m.de>, 
	Ilya Lipnitskiy <ilya.lipnitskiy@...il.com>, Jiaxun Yang <jiaxun.yang@...goat.com>, 
	linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org, Marc Zyngier <maz@...nel.org>, 
	Paul Burton <paulburton@...nel.org>, Peter Zijlstra <peterz@...radead.org>, 
	Serge Semin <fancer.lancer@...il.com>, Tiezhu Yang <yangtiezhu@...ngson.cn>
Subject: Re: [PATCH v8 10/13] dt-bindings: mips: cpu: Add property for broken
 HCI information

On Mon, Oct 28, 2024 at 06:59:32PM +0100, Aleksandar Rikalo wrote:
> From: Gregory CLEMENT <gregory.clement@...tlin.com>
> 
> Some CM3.5 reports show that Hardware Cache Initialization is
> complete, but in reality it's not the case. They also incorrectly
> indicate that Hardware Cache Initialization is supported. This
> optional property allows warning about this broken feature that cannot
> be detected at runtime.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
> Signed-off-by: Aleksandar Rikalo <arikalo@...il.com>
> Tested-by: Gregory CLEMENT <gregory.clement@...tlin.com>
> ---
>  Documentation/devicetree/bindings/mips/cpus.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

I cannot find this patch in v6, nothing in changelog explaining what
happened here.

> diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml
> index a85137add668..57e93c07ab1b 100644
> --- a/Documentation/devicetree/bindings/mips/cpus.yaml
> +++ b/Documentation/devicetree/bindings/mips/cpus.yaml
> @@ -47,6 +47,12 @@ properties:
>    clocks:
>      maxItems: 1
>  
> +  cm3-l2-config-hci-broken:

Are these names - cm3, l2, hci - obvious and known in MIPS? HCI usually
means something else - see drivers/bluetooth/ and drivers/nfc/

Is this property applicable for all MIPS vendors? There is no vendor
prefix here, so this is generic for this architecture, right?

Best regards,
Krzysztof


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