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Message-Id: <20241029-arm-generic-entry-v2-26-573519abef38@linaro.org>
Date: Tue, 29 Oct 2024 11:53:06 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Oleg Nesterov <oleg@...hat.com>, Russell King <linux@...linux.org.uk>,
Kees Cook <kees@...nel.org>, Andy Lutomirski <luto@...capital.net>,
Will Drewry <wad@...omium.org>, Frederic Weisbecker <frederic@...nel.org>,
"Paul E. McKenney" <paulmck@...nel.org>,
Jinjie Ruan <ruanjinjie@...wei.com>, Arnd Bergmann <arnd@...db.de>,
Ard Biesheuvel <ardb@...nel.org>, Al Viro <viro@...iv.linux.org.uk>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Linus Walleij <linus.walleij@...aro.org>
Subject: [PATCH RFC v2 26/28] ARM: entry: Move in-kernel hardirq tracing to
C
Move the code tracing hardirqs on/off into the C callbacks
for irqentry_enter_from_kernel_mode() and
irqentry_exit_to_kernel_mode().
The semantic difference occurred is that we alsways check
the PSR_I_BIT to determine if (hard) interrupts were enabled
or not. The assembly has a tweak to avoid this if we are
exiting an IRQ since it is obvious that IRQs must have been
enabled to get there, but for simplicity we just check it
for all exceptions.
Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
---
arch/arm/kernel/entry-armv.S | 13 ++++---------
arch/arm/kernel/entry-header.S | 19 ++-----------------
arch/arm/kernel/entry.c | 5 +++++
3 files changed, 11 insertions(+), 26 deletions(-)
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 21b11fe199cb..600375f6f5d8 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -157,7 +157,7 @@ ENDPROC(__und_invalid)
#define SPFIX(code...)
#endif
- .macro svc_entry, stack_hole=0, trace=1, uaccess=1, overflow_check=1
+ .macro svc_entry, stack_hole=0 uaccess=1, overflow_check=1
UNWIND(.fnstart )
sub sp, sp, #(SVC_REGS_SIZE + \stack_hole)
THUMB( add sp, r1 ) @ get SP in a GPR without
@@ -207,11 +207,6 @@ ENDPROC(__und_invalid)
mov r0, sp @ 'regs'
bl irqentry_enter_from_kernel_mode
- .if \trace
-#ifdef CONFIG_TRACE_IRQFLAGS
- bl trace_hardirqs_off
-#endif
- .endif
.endm
.align 5
@@ -238,7 +233,7 @@ __irq_svc:
blne svc_preempt
#endif
- svc_exit r5, irq = 1 @ return from exception
+ svc_exit r5 @ return from exception
UNWIND(.fnend )
ENDPROC(__irq_svc)
@@ -302,7 +297,7 @@ ENDPROC(__pabt_svc)
.align 5
__fiq_svc:
- svc_entry trace=0
+ svc_entry
mov r0, sp @ struct pt_regs *regs
bl handle_fiq_as_nmi
svc_exit_via_fiq
@@ -320,7 +315,7 @@ ENDPROC(__fiq_svc)
@
.align 5
__fiq_abt:
- svc_entry trace=0
+ svc_entry
ARM( msr cpsr_c, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 49a9c5cf6fd5..cfaf14d71378 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -199,26 +199,11 @@
.endm
- .macro svc_exit, rpsr, irq = 0
- .if \irq != 0
- @ IRQs already off
-#ifdef CONFIG_TRACE_IRQFLAGS
- @ The parent context IRQs must have been enabled to get here in
- @ the first place, so there's no point checking the PSR I bit.
- bl trace_hardirqs_on
-#endif
- .else
+ .macro svc_exit, rpsr
+
@ IRQs off again before pulling preserved data off the stack
disable_irq_notrace
-#ifdef CONFIG_TRACE_IRQFLAGS
- tst \rpsr, #PSR_I_BIT
- bleq trace_hardirqs_on
- tst \rpsr, #PSR_I_BIT
- blne trace_hardirqs_off
-#endif
- .endif
-
mov r0, sp @ 'regs'
bl irqentry_exit_to_kernel_mode
diff --git a/arch/arm/kernel/entry.c b/arch/arm/kernel/entry.c
index 674b5adcec00..1e1284cc4cae 100644
--- a/arch/arm/kernel/entry.c
+++ b/arch/arm/kernel/entry.c
@@ -59,8 +59,13 @@ noinstr void irqentry_exit_to_user_mode(struct pt_regs *regs)
noinstr void irqentry_enter_from_kernel_mode(struct pt_regs *regs)
{
+ trace_hardirqs_off();
}
noinstr void irqentry_exit_to_kernel_mode(struct pt_regs *regs)
{
+ if (interrupts_enabled(regs))
+ trace_hardirqs_on();
+ else
+ trace_hardirqs_off();
}
--
2.46.2
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