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Message-ID: <0bbd2514-ff51-4b0c-b3ad-547e4937d9f4@linaro.org>
Date: Tue, 29 Oct 2024 11:36:17 +0000
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: Marcus Folkesson <marcus.folkesson@...il.com>,
 Pratyush Yadav <pratyush@...nel.org>, Michael Walle <mwalle@...nel.org>,
 Miquel Raynal <miquel.raynal@...tlin.com>,
 Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>,
 Nicolas Ferre <nicolas.ferre@...rochip.com>,
 Alexandre Belloni <alexandre.belloni@...tlin.com>,
 Claudiu Beznea <claudiu.beznea@...on.dev>
Cc: linux-mtd@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] mtd: spi-nor: atmel: add at25sf321 entry



On 10/29/24 11:23 AM, Marcus Folkesson wrote:
> Add entry for the at25sf321 32Mbit SPI flash.
> 
> This flash is populated on a custom board and was tested at
> 10MHz frequency using the "ti,da830-spi" SPI controller.
> 

no sfdp for this one?

> Link:
> https://www.renesas.com/en/document/dst/at25sf321-datasheet?r=1608801
> 
> Signed-off-by: Marcus Folkesson <marcus.folkesson@...il.com>
> ---
> root# cat /sys/class/spi_master/spi1/spi1.1/spi-nor/partname
> at25sf321
> 
> root# cat /sys/class/spi_master/spi1/spi1.1/spi-nor/jedec_id
> 1f8701
> 
> root# cat /sys/class/spi_master/spi1/spi1.1/spi-nor/manufacturer
> atmel
> 

xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp?
or hexdump -Cv if you prefer

> root# cat /sys/kernel/debug/spi-nor/spi1.1/capabilities
> Supported read modes by the flash
>  1S-1S-1S
>   opcode        0x03
>   mode cycles   0
>   dummy cycles  0
>  1S-1S-1S (fast read)
>   opcode        0x0b
>   mode cycles   0
>   dummy cycles  8
> 
> Supported page program modes by the flash
>  1S-1S-1S
>   opcode        0x0
> 
> root# cat /sys/kernel/debug/spi-nor/spi1.1/params
> name            at25sf321
> id              1f 87 01
> size            4.00 MiB
> write size      1
> page size       256
> address nbytes  3
> flags           HAS_16BIT_SR
> 
> opcodes
>  read           0x0b
>   dummy cycles  8
>  erase          0x20
>  program        0x02
>  8D extension   none
> 
> protocols
>  read           1S-1S-1S
>  write          1S-1S-1S
>  register       1S-1S-1S
> 
> erase commands
>  20 (4.00 KiB) [0]
>  d8 (64.0 KiB) [1]
>  c7 (4.00 MiB)
> 
> sector map
>  region (in hex)   | erase mask | flags
>  ------------------+------------+----------
>  00000000-003fffff |     [01  ] |
> ---
> Changes in v2:
> - Change from at25sf321b to at25sf321
> - Link to v1: https://lore.kernel.org/r/20241018-spi-nor-v1-1-d725bfb701ec@gmail.com
> ---
>  drivers/mtd/spi-nor/atmel.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c
> index 45d1153a04a07b7c61f46b117311b24ab695038f..8285a16b253d54ae8c4a5302850244d2248aa755 100644
> --- a/drivers/mtd/spi-nor/atmel.c
> +++ b/drivers/mtd/spi-nor/atmel.c
> @@ -238,6 +238,11 @@ static const struct flash_info atmel_nor_parts[] = {
>  		.flags = SPI_NOR_HAS_LOCK,
>  		.no_sfdp_flags = SECT_4K,
>  		.fixups = &at25fs_nor_fixups
> +	}, {
> +		.id = SNOR_ID(0x1f, 0x87, 0x01),
> +		.name = "at25sf321",
> +		.size = SZ_4M,
> +		.no_sfdp_flags = SECT_4K,

it seems this flash supports dual and quad reads. Do you care to
add/test these modes?

you'll need mtd-utils

>  	},
>  };
>  
> 
> ---
> base-commit: 200289db261f0c8131a5756133e9d30966289c3b
> change-id: 20241018-spi-nor-dc29698dea0f
> 
> Best regards,

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