linux-kernel - Re: [PATCH v5 3/3] arm64: dts: qcom: sc8280xp-blackrock: dt definition for WDK2023

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Message-ID: <ZyHiGlDnC8uqk_LG@hovoldconsulting.com>
Date: Wed, 30 Oct 2024 08:36:58 +0100
From: Johan Hovold <johan@...nel.org>
To: jens.glathe@...schoolsolutions.biz
Cc: Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	Merck Hung <merckhung@...il.com>
Subject: Re: [PATCH v5 3/3] arm64: dts: qcom: sc8280xp-blackrock: dt
 definition for WDK2023

On Wed, Oct 30, 2024 at 08:09:21AM +0100, Jens Glathe via B4 Relay wrote:

> +&pcie2a {
> +	aspm-no-l0s;

There is no such property in the binding (or driver) and L0s is disabled
for all controllers on sc8280xp.

(I think I used a property like this in an early version of the patches
that ultimately disabled L0s however).

> +	max-link-speed = <16>;

That's pretty fast. And not supported as this would indicate PCIe
Gen16...

> +
> +	perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
> +	wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
> +
> +	vddpe-3v3-supply = <&vreg_nvme>;
> +	vdda-supply = <&vreg_l7d>;
> +
> +	pinctrl-0 = <&pcie2a_default>;
> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +};
> +
> +&pcie2a_phy {
> +	vdda-phy-supply = <&vreg_l4d>;
> +	vdda-pll-supply = <&vreg_l6d>;
> +
> +	status = "okay";
> +};
> +
> +&pcie4 {
> +	aspm-no-l0s;

As above.

> +	max-link-speed = <2>;
> +
> +	perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
> +	wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
> +
> +	vddpe-3v3-supply = <&vreg_wlan>;
> +	vdda-supply = <&vreg_l7d>;
> +
> +	pinctrl-0 = <&pcie4_default>;
> +	pinctrl-names = "default";
> +
> +	status = "okay";
> +};
> +
> +&pcie4_port0 {
> +	wifi@0 {
> +		compatible = "pci17cb,1103";
> +		reg = <0x10000 0x0 0x0 0x0 0x0>;
> +
> +		vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
> +		vddaon-supply = <&vreg_pmu_aon_0p8>;
> +		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
> +		vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
> +		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
> +		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
> +		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
> +		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
> +		vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
> +
> +		qcom,ath11k-calibration-variant = "volterra";

IIRC the other calibration variants use all upper case here. And is
Volterra sufficient? No vendor prefix or similar needed?

I think you need to get this acked by the ath11k maintainer (Kalle Valo)
first.

> +	};
> +};

> +&remoteproc_adsp {
> +	firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcadsp8280.mbn";

Shouldn't these paths reflect the DMI values as on the X13s?

> +&usb_0_hsphy {
> +	vdda-pll-supply = <&vreg_l9d>;
> +	vdda-phy-supply = <&vreg_l4d>;

The binding does not include a vdda-phy supply (same for the other HS
PHYs).

Where did this come from?

> +	vdda18-supply = <&vreg_l1c>;
> +	vdda33-supply = <&vreg_l7d>;
> +
> +	status = "okay";
> +};

Johan