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Message-ID: <6d82f0c4-d4f4-43e2-a74b-29b9d42dacf8@kernel.org>
Date: Wed, 30 Oct 2024 14:58:21 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Steffen Trumtrar <s.trumtrar@...gutronix.de>,
Dinh Nguyen <dinguyen@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Richard Cochran <richardcochran@...il.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, linux-clk@...r.kernel.org, kernel@...gutronix.de
Subject: Re: [PATCH 1/4] arm64: dts: agilex5: add gpio0
On 30/10/2024 13:10, Steffen Trumtrar wrote:
> gpio0 is the same as gpio1 with a different base address.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@...gutronix.de>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 1162978329c1637aa0fd9a4adef16a9ae5017ac3..57c28e284cccdb99ede6cea2bc0e8dd8aaf47fe9 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -222,6 +222,26 @@ i3c1: i3c@...a1000 {
> status = "disabled";
> };
>
> + gpio0: gpio@...03200 {
> + compatible = "snps,dw-apb-gpio";
> + reg = <0x10c03200 0x100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + resets = <&rst GPIO0_RESET>;
> + status = "disabled";
Why is this node disabled? Any external resources missing?
Best regards,
Krzysztof
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