linux-kernel - [PATCH 10/13] clk: eyeq: add EyeQ6H central fixed factor clocks

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Message-Id: <20241031-mbly-clk-v1-10-89d8b28e3006@bootlin.com>
Date: Thu, 31 Oct 2024 16:53:00 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>, 
 Grégory Clement <gregory.clement@...tlin.com>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, 
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: linux-mips@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org, 
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 Tawfik Bayouk <tawfik.bayouk@...ileye.com>, 
 Théo Lebrun <theo.lebrun@...tlin.com>
Subject: [PATCH 10/13] clk: eyeq: add EyeQ6H central fixed factor clocks

Previous setup was:
 - pll-cpu clock registered from driver at of_clk_init();
 - occ-cpu clock registered from DT using fixed-factor-clock compatible.

Now that drivers/clk/clk-eyeq.c supports registering fixed factors, use
that capability to register occ-cpu.

Also switch from hard-coded index 0 for pll-cpu to using the
EQ6HC_CENTRAL_PLL_CPU constant by exposed dt-bindings headers.

occ-cpu is exposed at of_clk_init() because it gets used by both the DT
CPU nodes and the GIC timer.

Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
---
 drivers/clk/clk-eyeq.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c
index 6337736ef0ccb963fc16f66b1c78c33fdff0f99f..4f6aa852038cfc4db0fc4473cf5e50c6c254b9ee 100644
--- a/drivers/clk/clk-eyeq.c
+++ b/drivers/clk/clk-eyeq.c
@@ -691,12 +691,19 @@ builtin_platform_driver(eqc_driver);
 
 /* Required early for GIC timer. */
 static const struct eqc_pll eqc_eyeq6h_central_early_plls[] = {
-	{ .index = 0, .name = "pll-cpu", .reg64 = 0x02C },
+	{ .index = EQ6HC_CENTRAL_PLL_CPU, .name = "pll-cpu", .reg64 = 0x02C },
+};
+
+static const struct eqc_fixed_factor eqc_eyeq6h_central_early_fixed_factors[] = {
+	{ EQ6HC_CENTRAL_CPU_OCC, "occ-cpu", 1, 1, EQ6HC_CENTRAL_PLL_CPU },
 };
 
 static const struct eqc_early_match_data eqc_eyeq6h_central_early_match_data __initconst = {
 	.early_pll_count	= ARRAY_SIZE(eqc_eyeq6h_central_early_plls),
 	.early_plls		= eqc_eyeq6h_central_early_plls,
+
+	.early_fixed_factor_count = ARRAY_SIZE(eqc_eyeq6h_central_early_fixed_factors),
+	.early_fixed_factors = eqc_eyeq6h_central_early_fixed_factors,
 };
 
 /* Required early for UART. */

-- 
2.47.0