lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAAhSdy3Rmhhv5uzOzCT_B3EzQiXgV1FejZQbc5sLpwwFOXd5cg@mail.gmail.com>
Date: Thu, 31 Oct 2024 10:37:10 +0530
From: Anup Patel <anup@...infault.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Inochi Amaoto <inochiama@...il.com>, Chen Wang <unicorn_wang@...look.com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, Peter Zijlstra <peterz@...radead.org>, 
	Inochi Amaoto <inochiama@...look.com>, Geert Uytterhoeven <geert+renesas@...der.be>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, Yangyu Chen <cyy@...self.name>, 
	Hal Feng <hal.feng@...rfivetech.com>, Yixun Lan <dlan@...too.org>, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v4 2/3] irqchip: add T-HEAD C900 ACLINT SSWI driver

Hi Thomas,

On Tue, Oct 29, 2024 at 1:16 PM Thomas Gleixner <tglx@...utronix.de> wrote:
>
> On Tue, Oct 22 2024 at 12:02, Inochi Amaoto wrote:
> > Add a driver for the T-HEAD C900 ACLINT SSWI device, which is an
> > enhanced implementation of the RISC-V ACLINT SSWI specification.
> > This device allows the system to send ipi via fast device interface.
> >
> > Signed-off-by: Inochi Amaoto <inochiama@...il.com>
>
> Can someone from the RISCV folks please confirm that thtis is good to
> go?

The T-HEAD C900 ACLINT SSWI is not compliant to any RISC-V specification
so at this point it is a T-HEAD specific device. The RISC-V ACLINT SSWI
specification cited by this driver was never ratified by RISC-V international
in-favor of the ratified RISC-V AIA specification which has a much cleaner
way of doing IPI (as software injected MSIs) implemented by the IMSIC
driver and this also supports IPI virtualization.

Since this is a T-HEAD specific implementation, the description in all
patches of this series should be updated to replace references of the
RISC-V ACLINT SSWI specification with publicly available T-HEAD
documentation. Once, this is done, I think this series can go ahead.

Regards,
Anup

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ