linux-kernel - [PATCH v3 3/3] arm64: dts: qcom: qcs8300: Add LLCC support for QCS8300

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Message-ID: <20241031-qcs8300_llcc-v3-3-bb56952cb83b@quicinc.com>
Date: Thu, 31 Oct 2024 15:14:38 +0800
From: Jingyi Wang <quic_jingyw@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>,
        Conor Dooley <conor@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>
CC: <quic_tengfan@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_tingweiz@...cinc.com>, <quic_aiquny@...cinc.com>,
        Jingyi Wang
	<quic_jingyw@...cinc.com>,
        <20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@...cinc.com>,
        <20241026-sar2130p-llcc-v3-0-2a58fa1b4d12@...aro.org>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>
Subject: [PATCH v3 3/3] arm64: dts: qcom: qcs8300: Add LLCC support for
 QCS8300

Add Last Level Cache Controller node on the QCS8300 platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Signed-off-by: Jingyi Wang <quic_jingyw@...cinc.com>
---
 arch/arm64/boot/dts/qcom/qcs8300.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 2c35f96c3f28..811c926c94f4 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -882,6 +882,21 @@ gem_noc: interconnect@...0000 {
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
+		llcc: system-cache-controller@...0000 {
+			compatible = "qcom,qcs8300-llcc";
+			reg = <0x0 0x09200000 0x0 0x80000>,
+			      <0x0 0x09300000 0x0 0x80000>,
+			      <0x0 0x09400000 0x0 0x80000>,
+			      <0x0 0x09500000 0x0 0x80000>,
+			      <0x0 0x09a00000 0x0 0x80000>;
+			reg-names = "llcc0_base",
+				    "llcc1_base",
+				    "llcc2_base",
+				    "llcc3_base",
+				    "llcc_broadcast_base";
+			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		pdc: interrupt-controller@...0000 {
 			compatible = "qcom,qcs8300-pdc", "qcom,pdc";
 			reg = <0x0 0xb220000 0x0 0x30000>,

-- 
2.25.1