linux-kernel - Re: [PATCH 3/3] riscv: hwprobe: export bfloat16 ISA extension

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Message-ID: <prcy6rwydyjz55uaw6rorqbjv64kxu2ibaq2dy3xeno4nzfr6e@akhf6btyc7lc>
Date: Thu, 31 Oct 2024 08:54:54 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Clément Léger <cleger@...osinc.com>, 
	Inochi Amaoto <inochiama@...il.com>, Jonathan Corbet <corbet@....net>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, Conor Dooley <conor@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Evan Green <evan@...osinc.com>, 
	Charlie Jenkins <charlie@...osinc.com>, Andrew Jones <ajones@...tanamicro.com>, 
	Andy Chiu <andybnac@...il.com>, Xiao Wang <xiao.w.wang@...el.com>, 
	Samuel Holland <samuel.holland@...ive.com>
Cc: linux-doc@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 3/3] riscv: hwprobe: export bfloat16 ISA extension

On Wed, Oct 30, 2024 at 10:48:47AM +0100, Clément Léger wrote:
> 
> 
> On 28/10/2024 08:17, Inochi Amaoto wrote:
> > Export Zfbmin, Zvfbfmin, Zvfbfwma ISA extension through hwprobe.
> > 
> > Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> > ---
> >  Documentation/arch/riscv/hwprobe.rst  | 12 ++++++++++++
> >  arch/riscv/include/uapi/asm/hwprobe.h |  3 +++
> >  2 files changed, 15 insertions(+)
> > 
> > diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
> > index 85b709257918..8c30dd06f3c0 100644
> > --- a/Documentation/arch/riscv/hwprobe.rst
> > +++ b/Documentation/arch/riscv/hwprobe.rst
> > @@ -239,6 +239,18 @@ The following keys are defined:
> >         ratified in commit 98918c844281 ("Merge pull request #1217 from
> >         riscv/zawrs") of riscv-isa-manual.
> >  
> > +  * :c:macro:`RISCV_HWPROBE_EXT_ZFBFMIN`: The Zfbfmin extension is supported as
> > +       defined in the RISC-V ISA manual starting from commit 4dc23d6229de
> > +       ("Added Chapter title to BF16").
> > +
> > +  * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFMIN`: The Zvfbfmin extension is supported as
> > +       defined in the RISC-V ISA manual starting from commit 4dc23d6229de
> > +       ("Added Chapter title to BF16").
> > +
> > +  * :c:macro:`RISCV_HWPROBE_EXT_ZVFBFWMA`: The Zvfbfwma extension is supported as
> > +       defined in the RISC-V ISA manual starting from commit 4dc23d6229de
> > +       ("Added Chapter title to BF16").
> > +
> >  * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated.  Returns similar values to
> >       :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
> >       mistakenly classified as a bitmask rather than a value.
> > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
> > index 1e153cda57db..95d00a065b4e 100644
> > --- a/arch/riscv/include/uapi/asm/hwprobe.h
> > +++ b/arch/riscv/include/uapi/asm/hwprobe.h
> > @@ -72,6 +72,9 @@ struct riscv_hwprobe {
> >  #define		RISCV_HWPROBE_EXT_ZCF		(1ULL << 46)
> >  #define		RISCV_HWPROBE_EXT_ZCMOP		(1ULL << 47)
> >  #define		RISCV_HWPROBE_EXT_ZAWRS		(1ULL << 48)
> > +#define		RISCV_HWPROBE_EXT_ZFBFMIN	(1ULL << 49)
> > +#define		RISCV_HWPROBE_EXT_ZVFBFMIN	(1ULL << 50)
> > +#define		RISCV_HWPROBE_EXT_ZVFBFWMA	(1ULL << 51)
> 
> Hi Inochi,
> 
> These should be added as well in sys_hwprobe.c (see hwprobe_isa_ext0()).
> 
> Thanks,
> 
> Clément
> 

OK, I will add it, thanks for the reminder.

Regards,
Inochi