linux-kernel - Re: [PATCH v5 03/10] clk: renesas: clk-vbattb: Add VBATTB clock driver

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Message-ID: <CAMuHMdUcw_UHAZRVGt=Tr0jv3NOPDibtPy1E-46Pq74YKFZxWg@mail.gmail.com>
Date: Thu, 31 Oct 2024 09:43:54 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Claudiu <claudiu.beznea@...on.dev>, mturquette@...libre.com, sboyd@...nel.org, 
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	alexandre.belloni@...tlin.com, magnus.damm@...il.com, p.zabel@...gutronix.de, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-rtc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH v5 03/10] clk: renesas: clk-vbattb: Add VBATTB clock driver

Hi Krzysztof,

On Thu, Oct 31, 2024 at 8:48 AM Krzysztof Kozlowski <krzk@...nel.org> wrote:
> On Wed, Oct 30, 2024 at 01:01:13PM +0200, Claudiu wrote:
> > From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >
> > The VBATTB IP of the Renesas RZ/G3S SoC controls the clock that is used
> > by the RTC. The input to the VBATTB could be a 32KHz crystal
> > or an external clock device.
> >
> > The HW block diagram for the clock generator is as follows:
> >
> >            +----------+ XC   `\
> > RTXIN  --->|          |----->| \       +----+  VBATTCLK
> >            | 32K clock|      |  |----->|gate|----------->
> >            | osc      | XBYP |  |      +----+
> > RTXOUT --->|          |----->| /
> >            +----------+      ,
> >
> > After discussions w/ Stephen Boyd the clock tree associated with this
> > hardware block was exported in Linux as:
> >
> > vbattb-xtal
> >    xbyp
> >    xc
> >       mux
> >          vbattbclk
> >
> > where:
> > - input-xtal is the input clock (connected to RTXIN, RTXOUT pins)
> > - xc, xbyp are mux inputs
> > - mux is the internal mux
> > - vbattclk is the gate clock that feeds in the end the RTC
> >
> > to allow selecting the input of the MUX though assigned-clock DT
> > properties, using the already existing clock drivers and avoid adding
> > other DT properties. If the crystal is connected on RTXIN,
> > RTXOUT pins the XC will be selected as mux input. If an external clock
> > device is connected on RTXIN, RTXOUT pins the XBYP will be selected as
> > mux input.
> >
> > The load capacitance of the internal crystal can be configured
> > with renesas,vbattb-load-nanofarads DT property.
> >
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>

> > --- a/drivers/clk/renesas/Kconfig
> > +++ b/drivers/clk/renesas/Kconfig
> > @@ -237,6 +237,10 @@ config CLK_RZV2H
> >       bool "RZ/V2H(P) family clock support" if COMPILE_TEST
> >       select RESET_CONTROLLER
> >
> > +config CLK_RENESAS_VBATTB
> > +     bool "Renesas VBATTB clock controller"
>
> tristate

Good point.
However, does it work as a module, or would that break the RTC?

And this is missing

        depends on ARCH_RENESAS || COMPILE_TEST

which I can add while applying.

>
> > +     select RESET_CONTROLLER
> > +

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds