linux-kernel - [PATCH v2] arm64: dts: qcom: qcs615: Add LLCC support for QCS615

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Message-ID: <20241031-add_llcc_dts_node_for_qcs615-v2-1-205766a607ca@quicinc.com>
Date: Thu, 31 Oct 2024 18:49:02 +0800
From: Song Xue <quic_songxue@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
CC: <kernel@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>,
        Song Xue <quic_songxue@...cinc.com>
Subject: [PATCH v2] arm64: dts: qcom: qcs615: Add LLCC support for QCS615

The QCS615 platform has LLCC(Last Level Cache Controller) as the system
cache controller. It includes 1 LLCC instance and 1 LLCC broadcast
interface.

Add LLCC node support for the QCS615 platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Signed-off-by: Song Xue <quic_songxue@...cinc.com>
---
This patch series depends on below patch series:
https://lore.kernel.org/linux-arm-msm/20241022-add_initial_support_for_qcs615-v4-0-0a551c6dd342@quicinc.com/
https://lore.kernel.org/linux-arm-msm/20241010-add_llcc_support_for_qcs615-v2-1-044432450a75@quicinc.com/

Changes in v2:
- Pad both register addresses to 8 hex digits.
- Link to v1: https://lore.kernel.org/r/20241011-add_llcc_dts_node_for_qcs615-v1-1-e7aa45244c36@quicinc.com
---
 arch/arm64/boot/dts/qcom/qcs615.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index ac4c4c751da1fbb28865877555ba317677bc6bd2..1c4695a57c5b4039b28f93449d3b435a4dc46c4d 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -495,6 +495,14 @@ dc_noc: interconnect@...0000 {
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
+		llcc: system-cache-controller@...0000 {
+			compatible = "qcom,qcs615-llcc";
+			reg = <0x0 0x09200000 0x0 0x50000>,
+			      <0x0 0x09600000 0x0 0x50000>;
+			reg-names = "llcc0_base",
+				    "llcc_broadcast_base";
+		};
+
 		gem_noc: interconnect@...0000 {
 			reg = <0x0 0x9680000 0x0 0x3e200>;
 			compatible = "qcom,qcs615-gem-noc";

---
base-commit: b6270c3bca987530eafc6a15f9d54ecd0033e0e3
change-id: 20241030-add_llcc_dts_node_for_qcs615-ee341a3eddeb
prerequisite-change-id: 20241022-add_initial_support_for_qcs615-2256f64a9c24:v4
prerequisite-patch-id: 09782474af7eecf1013425fd34f9d2f082fb3616
prerequisite-patch-id: 624720e543d7857e46d3ee49b8cea413772deb4c
prerequisite-patch-id: 04ca722967256efddc402b7bab94136a5174b0b9
prerequisite-patch-id: ab88a42ec69ad90e8509c9c5b7c6bdd595a7f783
prerequisite-patch-id: 918724fafe43acaa4c4b980bfabe36e9c3212cd1
prerequisite-patch-id: 3bd8edd83297815fcb1b81fcd891d3c14908442f
prerequisite-patch-id: fc1cfec4ecd56e669c161c4d2c3797fc0abff0ae
prerequisite-change-id: 20241009-add_llcc_support_for_qcs615-6685f5c031b3:v2
prerequisite-patch-id: 7f93f240f926884c60a86c3ca651bb2232b88bed
prerequisite-patch-id: 6758ca439e10ac057d7834bb42860eb58198287b

Best regards,
-- 
Song Xue <quic_songxue@...cinc.com>