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Message-ID: <4ce01e3b-9bcd-4d8c-bfe1-c2b17a4c2566@kernel.org>
Date: Fri, 1 Nov 2024 16:39:33 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Hector Martin <marcan@...can.st>, Nick Chan <towinchenmi@...il.com>
Cc: Sven Peter <sven@...npeter.dev>, Alyssa Rosenzweig
<alyssa@...enzweig.io>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, asahi@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH asahi-soc/dt 01/10] dt-bindings: arm: apple: apple,pmgr:
Add A7-A11 compatibles
On 01/11/2024 13:33, Hector Martin wrote:
> - First the ancient s5l series
> - Then all the t/sXXXX chips up to t8103 (M1) (numeric order, ignoring
> prefix letter)
> - Then the rest of the "baseline" Ax,Mx chips that continue after M1,
> which are all numbered t8xxx (numeric order)
> - Finally the t6xxx series (Mx Pro/Mx Max), which forks the timeline and
> numbering after t8103/M1 (M1 Pro = t6000).
>
> Unless there's significant objection I'd like to keep this pattern, it
> makes sense from the POV of people working on these chips.
No, no, it's fine, I am just forgetting where do we have exceptions. :)
Best regards,
Krzysztof
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