linux-kernel - Re: [PATCH 1/1] iommu/vt-d: Drain PRQs when domain removed from RID

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Message-ID: <b9867c71-921a-4c31-9433-31e7efe4cb35@linux.intel.com>
Date: Fri, 1 Nov 2024 09:51:58 +0800
From: Baolu Lu <baolu.lu@...ux.intel.com>
To: Joel Granados <joel.granados@...nel.org>
Cc: iommu@...ts.linux.dev, Joerg Roedel <joro@...tes.org>,
 Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
 Jason Gunthorpe <jgg@...pe.ca>, Kevin Tian <kevin.tian@...el.com>,
 Yi Liu <yi.l.liu@...el.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] iommu/vt-d: Drain PRQs when domain removed from RID

On 10/31/24 22:56, Joel Granados wrote:
> On Thu, Oct 31, 2024 at 05:51:39PM +0800, Lu Baolu wrote:
>> As this iommu driver now supports page faults for requests without
>> PASID, page requests should be drained when a domain is removed from
>> the RID2PASID entry.
>>
>> This results in the intel_iommu_drain_pasid_prq() call being moved to
>> intel_pasid_tear_down_entry(). This indicates that when a translation
>> is removed from any PASID entry and the PRI has been enabled on the
>> device, page requests are flushed in the domain detachment path.
>>
>> The intel_iommu_drain_pasid_prq() helper has been modified to support
>> sending device TLB invalidation requests for both PASID and non-PASID
>> cases.
>>
>> Signed-off-by: Lu Baolu<baolu.lu@...ux.intel.com>
>> ---
>>   drivers/iommu/intel/iommu.c |  1 -
>>   drivers/iommu/intel/pasid.c |  1 +
>>   drivers/iommu/intel/prq.c   | 22 +++++++---------------
>>   3 files changed, 8 insertions(+), 16 deletions(-)
>>
>> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
>> index 87a3563dfe54..3878f35be09d 100644
>> --- a/drivers/iommu/intel/iommu.c
>> +++ b/drivers/iommu/intel/iommu.c
>> @@ -4069,7 +4069,6 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid,
>>   	intel_iommu_debugfs_remove_dev_pasid(dev_pasid);
>>   	kfree(dev_pasid);
>>   	intel_pasid_tear_down_entry(iommu, dev, pasid, false);
>> -	intel_iommu_drain_pasid_prq(dev, pasid);
>>   }
>>   
>>   static int intel_iommu_set_dev_pasid(struct iommu_domain *domain,
>> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
>> index 7e76062a7ad2..31665fb62e1c 100644
>> --- a/drivers/iommu/intel/pasid.c
>> +++ b/drivers/iommu/intel/pasid.c
>> @@ -265,6 +265,7 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
>>   		iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
>>   
>>   	devtlb_invalidation_with_pasid(iommu, dev, pasid);
>> +	intel_iommu_drain_pasid_prq(dev, pasid);
>>   }
>>   
>>   /*
>> diff --git a/drivers/iommu/intel/prq.c b/drivers/iommu/intel/prq.c
>> index 3c50c848893f..ae7f6f34462f 100644
>> --- a/drivers/iommu/intel/prq.c
>> +++ b/drivers/iommu/intel/prq.c
>> @@ -66,12 +66,8 @@ void intel_iommu_drain_pasid_prq(struct device *dev, u32 pasid)
>>   	struct pci_dev *pdev;
>>   	int head, tail;
>>   	u16 sid, did;
>> -	int qdep;
>>   
>>   	info = dev_iommu_priv_get(dev);
>> -	if (WARN_ON(!info || !dev_is_pci(dev)))
> You do this on purpose because
> 1. It is not possible to go through this path without an iommu set in
>     the device
> 2. PRI within the intel driver is only relevant for PCI
> 3. There will always be a struct device_domain_info related to the
>     device iommu when doing PRI.
> right?

Yes.

--
baolu