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Message-Id: <20241101030902.579789-4-quic_qianyu@quicinc.com>
Date: Thu, 31 Oct 2024 20:09:00 -0700
From: Qiang Yu <quic_qianyu@...cinc.com>
To: manivannan.sadhasivam@...aro.org, vkoul@...nel.org, kishon@...nel.org,
        robh@...nel.org, andersson@...nel.org, konradybcio@...nel.org,
        krzk+dt@...nel.org, conor+dt@...nel.org, mturquette@...libre.com,
        sboyd@...nel.org, abel.vesa@...aro.org, quic_msarkar@...cinc.com,
        quic_devipriy@...cinc.com
Cc: dmitry.baryshkov@...aro.org, kw@...ux.com, lpieralisi@...nel.org,
        neil.armstrong@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, johan+linaro@...nel.org,
        Qiang Yu <quic_qianyu@...cinc.com>
Subject: [PATCH v8 3/5] PCI: qcom: Remove BDF2SID mapping config for SC8280X family SoC

The SC8280XP PCIe devicetree nodes do not specify an 'iommu-map' so the
config_sid() callback is effectively a no-op. Hence introduce a new ops
struct, namely ops_1_21_0 which is same as ops_1_9_0 except that it
doesn't have config_sid() callback to clean it up.

Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
---
 drivers/pci/controller/dwc/pcie-qcom.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index ef44a82be058..52e3d71028d8 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1364,6 +1364,16 @@ static const struct qcom_pcie_ops ops_1_9_0 = {
 	.config_sid = qcom_pcie_config_sid_1_9_0,
 };
 
+/* Qcom IP rev.: 1.21.0  Synopsys IP rev.: 5.60a */
+static const struct qcom_pcie_ops ops_1_21_0 = {
+	.get_resources = qcom_pcie_get_resources_2_7_0,
+	.init = qcom_pcie_init_2_7_0,
+	.post_init = qcom_pcie_post_init_2_7_0,
+	.host_post_init = qcom_pcie_host_post_init_2_7_0,
+	.deinit = qcom_pcie_deinit_2_7_0,
+	.ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+};
+
 /* Qcom IP rev.: 2.9.0  Synopsys IP rev.: 5.00a */
 static const struct qcom_pcie_ops ops_2_9_0 = {
 	.get_resources = qcom_pcie_get_resources_2_9_0,
@@ -1411,7 +1421,7 @@ static const struct qcom_pcie_cfg cfg_2_9_0 = {
 };
 
 static const struct qcom_pcie_cfg cfg_sc8280xp = {
-	.ops = &ops_1_9_0,
+	.ops = &ops_1_21_0,
 	.no_l0s = true,
 };
 
-- 
2.34.1


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