linux-kernel - [PATCH RFC 1/6] mmc: host: support wrapped keys in mmc

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Message-Id: <20241101031539.13285-2-quic_spuppala@quicinc.com>
Date: Fri,  1 Nov 2024 08:45:34 +0530
From: Seshu Madhavi Puppala <quic_spuppala@...cinc.com>
To: Adrian Hunter <adrian.hunter@...el.com>,
        Asutosh Das <quic_asutoshd@...cinc.com>,
        Ulf Hansson <ulf.hansson@...aro.org>
Cc: Ritesh Harjani <ritesh.list@...il.com>, linux-mmc@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        quic_gaurkash@...cinc.com, quic_neersoni@...cinc.com,
        quic_spuppala@...cinc.com
Subject: [PATCH RFC 1/6] mmc: host: support wrapped keys in mmc

Since wrapped keys are not part of the MMC specifications,
it needs to be treated as a supported quirk of the MMC
controller. This way, based on the quirk set during a host
probe, MMC crypto can choose to register either standard or
wrapped keys with block crypto profile.

Signed-off-by: Seshu Madhavi Puppala <quic_spuppala@...cinc.com>
---
 drivers/mmc/host/cqhci-crypto.c | 23 +++++++++++++++--------
 drivers/mmc/host/cqhci.h        |  6 ++++++
 2 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/host/cqhci-crypto.c b/drivers/mmc/host/cqhci-crypto.c
index 91da6de1d650..c4e7ae95bc7d 100644
--- a/drivers/mmc/host/cqhci-crypto.c
+++ b/drivers/mmc/host/cqhci-crypto.c
@@ -91,13 +91,15 @@ static int cqhci_crypto_keyslot_program(struct blk_crypto_profile *profile,
 	cfg.crypto_cap_idx = cap_idx;
 	cfg.config_enable = CQHCI_CRYPTO_CONFIGURATION_ENABLE;
 
-	if (ccap_array[cap_idx].algorithm_id == CQHCI_CRYPTO_ALG_AES_XTS) {
-		/* In XTS mode, the blk_crypto_key's size is already doubled */
-		memcpy(cfg.crypto_key, key->raw, key->size/2);
-		memcpy(cfg.crypto_key + CQHCI_CRYPTO_KEY_MAX_SIZE/2,
-		       key->raw + key->size/2, key->size/2);
-	} else {
-		memcpy(cfg.crypto_key, key->raw, key->size);
+	if (key->crypto_cfg.key_type != BLK_CRYPTO_KEY_TYPE_HW_WRAPPED) {
+		if (ccap_array[cap_idx].algorithm_id == CQHCI_CRYPTO_ALG_AES_XTS) {
+			/* In XTS mode, the blk_crypto_key's size is already doubled */
+			memcpy(cfg.crypto_key, key->raw, key->size/2);
+			memcpy(cfg.crypto_key + CQHCI_CRYPTO_KEY_MAX_SIZE/2,
+			       key->raw + key->size/2, key->size/2);
+		} else {
+			memcpy(cfg.crypto_key, key->raw, key->size);
+		}
 	}
 
 	err = cqhci_crypto_program_key(cq_host, key, &cfg, slot);
@@ -211,7 +213,12 @@ int cqhci_crypto_init(struct cqhci_host *cq_host)
 	/* Unfortunately, CQHCI crypto only supports 32 DUN bits. */
 	profile->max_dun_bytes_supported = 4;
 
-	profile->key_types_supported = BLK_CRYPTO_KEY_TYPE_STANDARD;
+	if (cq_host->quirks & CQHCI_QUIRK_USES_WRAPPED_CRYPTO_KEYS)
+		profile->key_types_supported =
+			BLK_CRYPTO_KEY_TYPE_HW_WRAPPED;
+	else
+		profile->key_types_supported =
+			BLK_CRYPTO_KEY_TYPE_STANDARD;
 
 	/*
 	 * Cache all the crypto capabilities and advertise the supported crypto
diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index 06099fd32f23..f6bc66bc6418 100644
--- a/drivers/mmc/host/cqhci.h
+++ b/drivers/mmc/host/cqhci.h
@@ -241,6 +241,12 @@ struct cqhci_host {
 	u32 quirks;
 #define CQHCI_QUIRK_SHORT_TXFR_DESC_SZ	0x1
 
+	/*
+	 * This quirk indicates that EMMC will be using HW wrapped keys
+	 * when using inline encryption.
+	 */
+#define CQHCI_QUIRK_USES_WRAPPED_CRYPTO_KEYS	0x2
+
 	bool enabled;
 	bool halted;
 	bool init_done;
-- 
2.17.1