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Message-ID: <20241101053154.497550-2-alexey.klimov@linaro.org>
Date: Fri, 1 Nov 2024 05:31:45 +0000
From: Alexey Klimov <alexey.klimov@...aro.org>
To: broonie@...nel.org,
konradybcio@...nel.org,
konrad.dybcio@....qualcomm.com,
andersson@...nel.org,
srinivas.kandagatla@...aro.org
Cc: tiwai@...e.com,
lgirdwood@...il.com,
perex@...ex.cz,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
dmitry.baryshkov@...aro.org,
linux-sound@...r.kernel.org,
linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 01/10] arm64: dts: qcom: sm6115: add LPASS devices
The rxmacro, txmacro, vamacro, soundwire nodes, lpass clock
controllers are required to support audio playback and
audio capture on sm6115 and its derivatives.
Cc: Konrad Dybcio <konradybcio@...nel.org>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Co-developed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Signed-off-by: Alexey Klimov <alexey.klimov@...aro.org>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 132 +++++++++++++++++++++++++++
1 file changed, 132 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index df2241237b26..8518a04edcbf 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -2687,6 +2687,138 @@ funnel_apss1_in: endpoint {
};
};
+ rxmacro: codec@...0000 {
+ compatible = "qcom,sm6115-lpass-rx-macro", "qcom,sm8250-lpass-rx-macro";
+ reg = <0x0 0xa600000 0x0 0x1000>;
+
+ clocks = <&q6afecc LPASS_CLK_ID_RX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_RX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&vamacro>;
+ clock-names = "mclk",
+ "npl",
+ "dcodec",
+ "fsgen";
+ assigned-clocks = <&q6afecc LPASS_CLK_ID_RX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_RX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ assigned-clock-rates = <22579200>,
+ <22579200>;
+ #clock-cells = <0>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ };
+
+ swr1: soundwire-controller@...0000 {
+ compatible = "qcom,soundwire-v1.6.0";
+ reg = <0x0 0x0a610000 0x0 0x2000>;
+ interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&rxmacro>;
+ clock-names = "iface";
+
+ resets = <&lpass_audiocc 0>;
+ reset-names = "swr_audio_cgcr";
+
+ label = "RX";
+ qcom,din-ports = <0>;
+ qcom,dout-ports = <5>;
+
+ qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ txmacro: codec@...0000 {
+ compatible = "qcom,sm6115-lpass-tx-macro";
+ reg = <0x0 0x0a620000 0x0 0x1000>;
+
+ clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&vamacro>;
+ clock-names = "mclk",
+ "npl",
+ "dcodec",
+ "fsgen";
+ assigned-clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ assigned-clock-rates = <19200000>,
+ <19200000>;
+ #clock-cells = <0>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ };
+
+ lpass_audiocc: clock-controller@...9000 {
+ compatible = "qcom,sm6115-lpassaudiocc";
+ reg = <0x0 0x0a6a9000 0x0 0x1000>;
+ #reset-cells = <1>;
+ };
+
+ vamacro: codec@...0000 {
+ compatible = "qcom,sm6115-lpass-va-macro", "qcom,sm8450-lpass-va-macro";
+ reg = <0x0 0x0a730000 0x0 0x1000>;
+ clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "mclk",
+ "dcodec",
+ "npl";
+ assigned-clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ assigned-clock-rates = <19200000>,
+ <19200000>;
+ #clock-cells = <0>;
+ clock-output-names = "fsgen";
+ #sound-dai-cells = <1>;
+ };
+
+ swr0: soundwire-controller@...0000 {
+ compatible = "qcom,soundwire-v1.6.0";
+ reg = <0x0 0x0a740000 0x0 0x2000>;
+ interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&txmacro>;
+ clock-names = "iface";
+
+ resets = <&lpasscc 0>;
+ reset-names = "swr_audio_cgcr";
+
+ label = "VA_TX";
+ qcom,din-ports = <3>;
+ qcom,dout-ports = <0>;
+
+ qcom,ports-sinterval-low = /bits/ 8 <0x03 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x01>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0x00 0x00 0x00>;
+
+ #sound-dai-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ };
+
+ lpasscc: clock-controller@...c000 {
+ compatible = "qcom,sm6115-lpasscc";
+ reg = <0x0 0x0a7ec000 0x0 0x1000>;
+ #reset-cells = <1>;
+ };
+
remoteproc_adsp: remoteproc@...0000 {
compatible = "qcom,sm6115-adsp-pas";
reg = <0x0 0x0ab00000 0x0 0x100>;
--
2.45.2
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