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Message-ID: <ZyS50DFLhHVlnRtd@linaro.org>
Date: Fri, 1 Nov 2024 13:21:52 +0200
From: Abel Vesa <abel.vesa@...aro.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Johan Hovold <johan@...nel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
	linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: x1e80100: Describe TLMM pins
 for SDC2

On 24-10-28 14:10:54, Konrad Dybcio wrote:
> On 28.10.2024 9:48 AM, Abel Vesa wrote:
> > On 24-10-25 20:34:19, Konrad Dybcio wrote:
> >> On 22.10.2024 12:46 PM, Abel Vesa wrote:
> >>> Describe the SDC2 default and sleep state pins configuration
> >>> in TLMM. Do this in SoC dtsi file since they will be shared
> >>> across multiple boards.
> >>>
> >>> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> >>> ---
> >>
> >> Not very useful on its own but okay..
> > 
> > Fair enough. For some reason, I'm not able to get sdc4 pinconf
> > to work.
> 
> Any chance you tried to define 'sdc4_cmd' etc.? This one seems to have
> sdc4 pins on gpio127..=132

Yes.

But since the sdc4 pins can have other functions and since there is no
device that uses them (yet). Shouldn't we just skip describing the sdc4
pinconf entirely as that should be done on a per-board basis?

> 
> Konrad

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