linux-kernel - Re: [PATCH 4/5] arm64: dts: qcom: Add base sm8750 dtsi and mtp and qrd dts

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Message-ID: <c4407327-1060-4805-abb8-0c7bcb067ee4@oss.qualcomm.com>
Date: Sat, 2 Nov 2024 10:36:04 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Melody Olvera <quic_molvera@...cinc.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, Lee Jones <lee@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Arnd Bergmann <arnd@...db.de>,
        Nícolas F . R . A . Prado <nfraprado@...labora.com>,
        Stephen Boyd <sboyd@...nel.org>, Trilok Soni <quic_tsoni@...cinc.com>,
        Satya Durga Srinivasu Prabhala <quic_satyap@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Taniya Das <quic_tdas@...cinc.com>,
        Jishnu Prakash <quic_jprakash@...cinc.com>,
        Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
Subject: Re: [PATCH 4/5] arm64: dts: qcom: Add base sm8750 dtsi and mtp and
 qrd dts

On 22.10.2024 1:21 AM, Melody Olvera wrote:
> Add base dtsi for the sm8750 SoC describing the CPUs, GCC and
> RPMHCC clock controllers, geni UART, interrupt controller, TLMM,
> reserved memory, interconnects, regulator, and SMMU nodes. Also add
> MTP and QRD board dts files for sm8750.
> 
> Co-developed-by: Taniya Das <quic_tdas@...cinc.com>
> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
> Co-developed-by: Jishnu Prakash <quic_jprakash@...cinc.com>
> Signed-off-by: Jishnu Prakash <quic_jprakash@...cinc.com>
> Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
> Signed-off-by: Melody Olvera <quic_molvera@...cinc.com>
> ---

[...]

> +&spmi_bus {
> +	pm8550ve_d: pmic@3 {

These usually go to a separate file each.. But I see why that would
be difficult here.

Lately I've been a fan of <socname>-pmics.dtsi. WDYT, Bjorn?

[...]

> +		apps_smmu: iommu@...00000 {
> +			compatible = "qcom,sm8750-smmu-500", "qcom,smmu-500", "arm,mmu-500";
> +			reg = <0x0 0x15000000 0x0 0x100000>;
> +

[...]

> +			#iommu-cells = <2>;
> +			#global-interrupts = <1>;

This is usually dma-coherent, you can determine that through a smoke
test

> +		};
> +
> +		intc: interrupt-controller@...00000 {
> +			compatible = "arm,gic-v3";
> +			reg = <0x0 0x16000000 0x0 0x10000>,     /* GICD */
> +			      <0x0 0x16080000 0x0 0x200000>;    /* GICR * 12 */

These comments are copypasted gen to gen and don't bring much
information atop what's in bindings

Konrad