linux-kernel - Re: [PATCH] EDAC/ie31200: Add Kaby Lake-S dual-core host bridge ID

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Message-ID: <b990a1a9-97e5-469a-8469-0ea5bdc0fc03@akamai.com>
Date: Mon, 4 Nov 2024 11:15:49 -0500
From: Jason Baron <jbaron@...mai.com>
To: Borislav Petkov <bp@...en8.de>
Cc: James Ye <jye836@...il.com>, linux-edac@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] EDAC/ie31200: Add Kaby Lake-S dual-core host bridge ID

On 11/4/24 11:04 AM, Borislav Petkov wrote:
> !-------------------------------------------------------------------|
>    This Message Is From an External Sender
>    This message came from outside your organization.
> |-------------------------------------------------------------------!
> 
> Jason,
> 
> ack/nak?
> 



Sorry, seems fine...

Acked-by: Jason Baron <jbaron@...mai.com>


Thanks,

-Jason


> On Sat, Aug 24, 2024 at 10:06:22PM +1000, James Ye wrote:
>> Add device ID for dual-core Kaby Lake-S processors e.g. i3-7100.
>>
>> Signed-off-by: James Ye <jye836@...il.com>
>> ---
>>   drivers/edac/ie31200_edac.c | 8 ++++++--
>>   1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
>> index 9ef13570f2e5..4fc16922dc1a 100644
>> --- a/drivers/edac/ie31200_edac.c
>> +++ b/drivers/edac/ie31200_edac.c
>> @@ -19,7 +19,8 @@
>>    * 0c04: Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller
>>    * 0c08: Xeon E3-1200 v3 Processor DRAM Controller
>>    * 1918: Xeon E3-1200 v5 Skylake Host Bridge/DRAM Registers
>> - * 5918: Xeon E3-1200 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers
>> + * 590f: Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers
>> + * 5918: Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers
>>    * 190f: 6th Gen Core Dual-Core Processor Host Bridge/DRAM Registers
>>    * 191f: 6th Gen Core Quad-Core Processor Host Bridge/DRAM Registers
>>    * 3e..: 8th/9th Gen Core Processor Host Bridge/DRAM Registers
>> @@ -67,7 +68,8 @@
>>   #define PCI_DEVICE_ID_INTEL_IE31200_HB_8  0x190F
>>   #define PCI_DEVICE_ID_INTEL_IE31200_HB_9  0x1918
>>   #define PCI_DEVICE_ID_INTEL_IE31200_HB_10 0x191F
>> -#define PCI_DEVICE_ID_INTEL_IE31200_HB_11 0x5918
>> +#define PCI_DEVICE_ID_INTEL_IE31200_HB_11 0x590f
>> +#define PCI_DEVICE_ID_INTEL_IE31200_HB_12 0x5918
>>   
>>   /* Coffee Lake-S */
>>   #define PCI_DEVICE_ID_INTEL_IE31200_HB_CFL_MASK 0x3e00
>> @@ -88,6 +90,7 @@
>>   	 ((did) == PCI_DEVICE_ID_INTEL_IE31200_HB_9) ||                        \
>>   	 ((did) == PCI_DEVICE_ID_INTEL_IE31200_HB_10) ||                       \
>>   	 ((did) == PCI_DEVICE_ID_INTEL_IE31200_HB_11) ||                       \
>> +	 ((did) == PCI_DEVICE_ID_INTEL_IE31200_HB_12) ||                       \
>>   	 (((did) & PCI_DEVICE_ID_INTEL_IE31200_HB_CFL_MASK) ==                 \
>>   	  PCI_DEVICE_ID_INTEL_IE31200_HB_CFL_MASK))
>>   
>> @@ -587,6 +590,7 @@ static const struct pci_device_id ie31200_pci_tbl[] = {
>>   	{ PCI_VEND_DEV(INTEL, IE31200_HB_9),      PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>>   	{ PCI_VEND_DEV(INTEL, IE31200_HB_10),     PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>>   	{ PCI_VEND_DEV(INTEL, IE31200_HB_11),     PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>> +	{ PCI_VEND_DEV(INTEL, IE31200_HB_12),     PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>>   	{ PCI_VEND_DEV(INTEL, IE31200_HB_CFL_1),  PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>>   	{ PCI_VEND_DEV(INTEL, IE31200_HB_CFL_2),  PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>>   	{ PCI_VEND_DEV(INTEL, IE31200_HB_CFL_3),  PCI_ANY_ID, PCI_ANY_ID, 0, 0, IE31200 },
>> -- 
>> 2.46.0
>>
>>
>